Protecting Analog Circuits Using Switch Mode Time Domain Locking

IF 2.8 2区工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Pub Date : 2025-01-22 DOI:10.1109/TVLSI.2025.3528320

Utkarsh Kumar;Sudhanshu Khanna;Ankit Mittal;Aatmesh Shrivastava

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引用次数: 0

Abstract

Analog circuits remain vulnerable to different types of supply chain attacks including piracy, overproduction, counterfeiting, and reverse engineering. In this article, we present switch mode time domain locking (SMDL) technique to protect analog circuits. This technique integrates a locking mechanism into the time-domain functionality of the circuit. It uses random-key-based switching phases for analog circuits instead of fixed clocks that are conventionally used. The random switching phases are dependent on a key which can be made arbitrarily long. A correct key (CK) with correct alignment of phases can unlock circuit functionality. The locking technique can be applied to a variety of switch-mode analog circuits such as filters, amplifiers, regulators, among others. We implemented this technique on a folded cascode amplifier (FCA) and on a switched-capacitor bandgap reference (BGR) circuit. In both techniques, we employ a 128-bit key to lock the circuit functionality. The design is implemented in a 65-nm CMOS technology. An incorrect key (IK) introduces almost 100% variation in the circuit functionality, ensuring high level of security.

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模拟电路仍然容易受到不同类型的供应链攻击，包括盗版、过度生产、仿冒和逆向工程。本文介绍了保护模拟电路的开关模式时域锁定（SMDL）技术。该技术将锁定机制集成到电路的时域功能中。它在模拟电路中使用基于随机密钥的开关相位，而不是传统使用的固定时钟。随机开关阶段取决于密钥，而密钥的长度可任意设定。正确的密钥（CK）和正确的相位排列可以解锁电路功能。锁定技术可应用于各种开关模式模拟电路，如滤波器、放大器、稳压器等。我们在折叠级联放大器（FCA）和开关电容带隙基准（BGR）电路上实现了这一技术。在这两种技术中，我们都采用了 128 位密钥来锁定电路功能。设计采用 65 纳米 CMOS 技术实现。不正确的密钥（IK）几乎会导致电路功能出现 100% 的变化，从而确保了高水平的安全性。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 工程技术-工程：电子与电气

CiteScore

6.40

自引率

7.10%

发文量

187

审稿时长

3.6 months

期刊介绍： The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.