{"title":"A 360° Tunable Phase Shifter With Low Phase Error Based on Bandpass Networks in 0.25- μm GaN Technology","authors":"Hanjun Zhao;Xu Yan;Hui Chu;Xiaohua Zhu;Yongxin Guo","doi":"10.1109/TVLSI.2024.3489355","DOIUrl":null,"url":null,"abstract":"This brief presents a 360° tunable phase shifter (PS) with low phase error in a 0.25-<inline-formula> <tex-math>$\\mu $ </tex-math></inline-formula>m GaN-on-SiC HEMT process. To achieve these features, the design incorporates two key innovations: a novel switched-bandpass phase-shifting cell (PSC) topology and a Q-learning-based optimization algorithm, both applied for the first time in monolithic microwave integrated circuit (MMIC) PS designs. The adverse effects of the charge trapping effect in GaN HEMT switches are mitigated by using a nonlinear equivalent circuit model. A PS prototype consisting of a fifth-order bandpass PSC and two third-order bandpass PSCs with a core area of <inline-formula> <tex-math>$1.25\\times 2.5$ </tex-math></inline-formula> mm2 is designed, fabricated, and measured. Experimental results demonstrate a low rms phase error of less than 7.0°, along with high power linearity characterized by an IP<inline-formula> <tex-math>$_{\\mathrm {1\\,dB}}$ </tex-math></inline-formula> of 37 dBm and an IIP3 of 48 dBm, over a frequency range from 4.1 to 5.3 GHz.","PeriodicalId":13425,"journal":{"name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","volume":"33 4","pages":"1172-1176"},"PeriodicalIF":2.8000,"publicationDate":"2024-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10750908/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
This brief presents a 360° tunable phase shifter (PS) with low phase error in a 0.25-$\mu $ m GaN-on-SiC HEMT process. To achieve these features, the design incorporates two key innovations: a novel switched-bandpass phase-shifting cell (PSC) topology and a Q-learning-based optimization algorithm, both applied for the first time in monolithic microwave integrated circuit (MMIC) PS designs. The adverse effects of the charge trapping effect in GaN HEMT switches are mitigated by using a nonlinear equivalent circuit model. A PS prototype consisting of a fifth-order bandpass PSC and two third-order bandpass PSCs with a core area of $1.25\times 2.5$ mm2 is designed, fabricated, and measured. Experimental results demonstrate a low rms phase error of less than 7.0°, along with high power linearity characterized by an IP$_{\mathrm {1\,dB}}$ of 37 dBm and an IIP3 of 48 dBm, over a frequency range from 4.1 to 5.3 GHz.
期刊介绍:
The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society.
Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels.
To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.