Quantum Computer Architecture for Quantum Error Correction With Distributing Process to Multiple Temperature Layers

IF 1.5 4区 计算机科学 Q3 COMPUTER SCIENCE, SOFTWARE ENGINEERING
Ryuji Ukai, Chihiro Yoshimura, Hiroyuki Mizuno
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引用次数: 0

Abstract

Quantum computers are capable of performing large-scale calculations in a shorter time than conventional classical computers. Because quantum computers are realized in microscopic physical systems, unintended change in the quantum state is unavoidable due to interaction between environment, and it would lead to error in computation. Therefore, quantum error correction is needed to detect and correct errors that have occurred. In this paper, we propose quantum computer architecture for quantum error correction by taking account that the components of a quantum computer with quantum dots in silicon are divided into multiple temperature layers inside and outside the dilution refrigerator. Based on the required performance and possible processing capacity, each component was distributed in various temperature layers: the chip with qubits and the chip for generation of precise analog signals to control qubits are placed on 100 mK and 4 K stages inside the dilution refrigerator, respectively, while real-time digital processing is performed outside the dilution refrigerator. We then experimentally demonstrate the digital control sequence for quantum error correction combined with a simulator which simulates quantum states based on control commands from the digital processing system. The simulator enables the proof-of-principle experiment of system architecture independent of the development of the chips. The real time processing including determination of feed-forward operation and transmission of feed-forward operation commands is carried out by a field-programmable gate array (FPGA) outside the dilution refrigerator within 0.01 ms for bit-flip or phase-flip error corrections. This is a sufficiently short time compared to the assumed relaxation time, which is the approximate time that the quantum state can be preserved, meaning that our proposed architecture is applicable to quantum error correction.

多温度层分布量子纠错的量子计算机体系结构
量子计算机能够在比传统经典计算机更短的时间内进行大规模计算。由于量子计算机是在微观物理系统中实现的,由于环境之间的相互作用,量子态不可避免地会发生意想不到的变化,从而导致计算误差。因此,需要量子纠错来检测和纠正已经发生的错误。在本文中,我们提出了量子纠错的量子计算机架构,考虑到硅中量子点的量子计算机组件在稀释冰箱内外分为多个温度层。根据所需的性能和可能的处理能力,将每个组件分布在不同的温度层:具有量子位的芯片和用于生成精确模拟信号以控制量子位的芯片分别放置在稀释冰箱内的100 mK和4 K级上,而实时数字处理则在稀释冰箱外进行。然后,我们通过实验演示了量子纠错的数字控制序列,并结合了基于数字处理系统的控制命令模拟量子态的模拟器。该模拟器可以独立于芯片的开发进行系统架构的原理验证实验。在稀释制冷机外的现场可编程门阵列(FPGA)在0.01 ms内进行实时处理,包括前馈操作的确定和前馈操作命令的传输,以进行位翻转或相位翻转错误校正。与假设的松弛时间相比,这是一个足够短的时间,松弛时间是量子态可以保持的近似时间,这意味着我们提出的架构适用于量子误差校正。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
Concurrency and Computation-Practice & Experience
Concurrency and Computation-Practice & Experience 工程技术-计算机:理论方法
CiteScore
5.00
自引率
10.00%
发文量
664
审稿时长
9.6 months
期刊介绍: Concurrency and Computation: Practice and Experience (CCPE) publishes high-quality, original research papers, and authoritative research review papers, in the overlapping fields of: Parallel and distributed computing; High-performance computing; Computational and data science; Artificial intelligence and machine learning; Big data applications, algorithms, and systems; Network science; Ontologies and semantics; Security and privacy; Cloud/edge/fog computing; Green computing; and Quantum computing.
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