Design of high-speed and 6-bit flash ADC module for non-contact vital sign signal processing in biomedical application

IF 1.2 4区 工程技术 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Pushparaj Pal, Banoth Krishna, Amod Kumar, Sandeep Singh Gill, Garima Saini
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Abstract

The signal processing is the primary factor for improving the accuracy of bio signals in electronic devices with respect to speed and resolution. The ADC is often called the heart of the electronics processing system. Without the ADC module, the device cannot proceed to further processing stages and becomes non-functional. In biomedical applications, healthcare service providers remotely monitor patients using non-contact vital sign detection and signal monitoring through CW Doppler radar of 2.45 GHz. The system collects tiny signals remotely, with HR signals of (0.2–0.5)Hz and RR signals of (0.3–0.7)Hz. Recovering these signals from the received data, containing clutters and noise, is a challenging task that requires a high-speed, high-resolution, and accurate-based system. The SAR-ADC has existing problems with high speed and bit resolution, system performance, and accuracy, which are overcome in the flash ADC with reduced hardware. The received signal is further processed using the DAQ system. The system uses a 6-bit 1GS/s flash ADC for enhanced system performance. Simulation results show an INL of -0.49/+0.76 LSB and DNL of -0.65/+0.59 LSB, respectively. At -0.3 dBFS and a 1 kHz sinusoidal signal, the SNDR is 47dB (6.4 ENOB). The system operates at power level of 96.08uW with a supply voltage of 1.6 V. The implementation is carried out using simulation tools such as Cadence Virtuoso, and MATLAB platforms.

Abstract Image

生物医学应用中非接触生命体征信号处理的高速6位闪存ADC模块设计
信号处理是提高电子设备中生物信号准确性的主要因素,涉及速度和分辨率。ADC通常被称为电子处理系统的心脏。如果没有ADC模块,器件就无法进行进一步的处理阶段,从而变得无功能。在生物医学应用中,医疗保健服务提供商使用非接触式生命体征检测和2.45 GHz连续波多普勒雷达信号监测远程监测患者。远程采集微小信号,HR信号为(0.2 ~ 0.5)Hz, RR信号为(0.3 ~ 0.7)Hz。从接收到的包含杂波和噪声的数据中恢复这些信号是一项具有挑战性的任务,需要高速、高分辨率和精确的系统。SAR-ADC存在高速率、高位分辨率、系统性能和精度等问题,这些问题在硬件体积较小的闪存ADC中得到了克服。接收到的信号使用DAQ系统进行进一步处理。系统采用6位1GS/s闪存ADC增强系统性能。仿真结果表明,INL为-0.49/+0.76 LSB, DNL为-0.65/+0.59 LSB。在-0.3 dBFS和1 kHz正弦信号时,SNDR为47dB (6.4 ENOB)。系统工作功率为96.08uW,电源电压为1.6 V。利用Cadence Virtuoso等仿真工具和MATLAB平台进行实现。
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来源期刊
Analog Integrated Circuits and Signal Processing
Analog Integrated Circuits and Signal Processing 工程技术-工程:电子与电气
CiteScore
0.30
自引率
7.10%
发文量
141
审稿时长
7.3 months
期刊介绍: Analog Integrated Circuits and Signal Processing is an archival peer reviewed journal dedicated to the design and application of analog, radio frequency (RF), and mixed signal integrated circuits (ICs) as well as signal processing circuits and systems. It features both new research results and tutorial views and reflects the large volume of cutting-edge research activity in the worldwide field today. A partial list of topics includes analog and mixed signal interface circuits and systems; analog and RFIC design; data converters; active-RC, switched-capacitor, and continuous-time integrated filters; mixed analog/digital VLSI systems; wireless radio transceivers; clock and data recovery circuits; and high speed optoelectronic circuits and systems.
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