Design of high-speed and 6-bit flash ADC module for non-contact vital sign signal processing in biomedical application

IF 1.2 4区 工程技术 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Pushparaj Pal, Banoth Krishna, Amod Kumar, Sandeep Singh Gill, Garima Saini
{"title":"Design of high-speed and 6-bit flash ADC module for non-contact vital sign signal processing in biomedical application","authors":"Pushparaj Pal,&nbsp;Banoth Krishna,&nbsp;Amod Kumar,&nbsp;Sandeep Singh Gill,&nbsp;Garima Saini","doi":"10.1007/s10470-025-02376-2","DOIUrl":null,"url":null,"abstract":"<div><p>The signal processing is the primary factor for improving the accuracy of bio signals in electronic devices with respect to speed and resolution. The ADC is often called the heart of the electronics processing system. Without the ADC module, the device cannot proceed to further processing stages and becomes non-functional. In biomedical applications, healthcare service providers remotely monitor patients using non-contact vital sign detection and signal monitoring through CW Doppler radar of 2.45 GHz. The system collects tiny signals remotely, with HR signals of (0.2–0.5)Hz and RR signals of (0.3–0.7)Hz. Recovering these signals from the received data, containing clutters and noise, is a challenging task that requires a high-speed, high-resolution, and accurate-based system. The SAR-ADC has existing problems with high speed and bit resolution, system performance, and accuracy, which are overcome in the flash ADC with reduced hardware. The received signal is further processed using the DAQ system. The system uses a 6-bit 1GS/s flash ADC for enhanced system performance. Simulation results show an INL of -0.49/+0.76 LSB and DNL of -0.65/+0.59 LSB, respectively. At -0.3 dBFS and a 1 kHz sinusoidal signal, the SNDR is 47dB (6.4 ENOB). The system operates at power level of 96.08uW with a supply voltage of 1.6 V. The implementation is carried out using simulation tools such as Cadence Virtuoso, and MATLAB platforms.</p></div>","PeriodicalId":7827,"journal":{"name":"Analog Integrated Circuits and Signal Processing","volume":"123 2","pages":""},"PeriodicalIF":1.2000,"publicationDate":"2025-03-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Analog Integrated Circuits and Signal Processing","FirstCategoryId":"5","ListUrlMain":"https://link.springer.com/article/10.1007/s10470-025-02376-2","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0

Abstract

The signal processing is the primary factor for improving the accuracy of bio signals in electronic devices with respect to speed and resolution. The ADC is often called the heart of the electronics processing system. Without the ADC module, the device cannot proceed to further processing stages and becomes non-functional. In biomedical applications, healthcare service providers remotely monitor patients using non-contact vital sign detection and signal monitoring through CW Doppler radar of 2.45 GHz. The system collects tiny signals remotely, with HR signals of (0.2–0.5)Hz and RR signals of (0.3–0.7)Hz. Recovering these signals from the received data, containing clutters and noise, is a challenging task that requires a high-speed, high-resolution, and accurate-based system. The SAR-ADC has existing problems with high speed and bit resolution, system performance, and accuracy, which are overcome in the flash ADC with reduced hardware. The received signal is further processed using the DAQ system. The system uses a 6-bit 1GS/s flash ADC for enhanced system performance. Simulation results show an INL of -0.49/+0.76 LSB and DNL of -0.65/+0.59 LSB, respectively. At -0.3 dBFS and a 1 kHz sinusoidal signal, the SNDR is 47dB (6.4 ENOB). The system operates at power level of 96.08uW with a supply voltage of 1.6 V. The implementation is carried out using simulation tools such as Cadence Virtuoso, and MATLAB platforms.

Abstract Image

求助全文
约1分钟内获得全文 求助全文
来源期刊
Analog Integrated Circuits and Signal Processing
Analog Integrated Circuits and Signal Processing 工程技术-工程:电子与电气
CiteScore
0.30
自引率
7.10%
发文量
141
审稿时长
7.3 months
期刊介绍: Analog Integrated Circuits and Signal Processing is an archival peer reviewed journal dedicated to the design and application of analog, radio frequency (RF), and mixed signal integrated circuits (ICs) as well as signal processing circuits and systems. It features both new research results and tutorial views and reflects the large volume of cutting-edge research activity in the worldwide field today. A partial list of topics includes analog and mixed signal interface circuits and systems; analog and RFIC design; data converters; active-RC, switched-capacitor, and continuous-time integrated filters; mixed analog/digital VLSI systems; wireless radio transceivers; clock and data recovery circuits; and high speed optoelectronic circuits and systems.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信