Scalable quantum eraser with superconducting integrated circuits

Abstract

A fast and scalable scheme for multi-qubit resetting in superconducting quantum processors is proposed by exploiting the feasibility of frequency-tunable transmon qubits and transmon-like couplers to engineer a full programmable superconducting erasing head. We demonstrate the emergence of collective effects that lead to a decoherence-free subspace during the erasing process. The presence of such a subspace negatively impacts the device’s performance and has been overlooked in other multi-qubit chips. To circumvent this issue and pave the way to the device’s scalability, we employ tunable frequency couplers to identify a specific set of parameters that enables us to erase even those states within this subspace, ensuring the simultaneous multi-qubit resetting, verified here for the two-qubit case. In contrast, we show that collectivity effects can also emerge as an ingredient to speed up the erasing process. To end, we offer a proposal to build up integrated superconducting processors that can be efficiently connected to erasure heads in a scalable way.