Taylor modeling and comparative research containing aspect-ratio dependent optimization of three-dimensional Hk superjunction MOSFETs

IF 1.9 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Haimeng Huang, Zhentao Xiao, Zonghao Zhang, Chenxing Wang, Hongqiang Yang
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引用次数: 0

Abstract

A proposed optimization for high-k superjunction (Hk-SJ) MOSFETs focuses on reducing specific ON-resistance (Ron,sp) in drift regions for three dimensional (3D) configurations in two cases (3DHkcore and 3DHkshell) compared to 3D conventional SJ (C-SJ) and two dimensional Hk-SJ (2DHk). Under constraints of avalanche breakdown and critical depletion, the optimized Ron,sp and design parameters are determined. 3DHkcore achieves the lowest Ron,sp of 12.43 mΩcm2 at 800 V breakdown voltage (BV) for small aspect ratios (AR) due to the lower breakdown electric field (E-field) and impact ionization integral value, while 3DHkshell excels 3DHkcore and 2DHk with a lower Ron,sp of 6.395 mΩcm2 at large AR. Comparative research containing charge imbalance, temperature robustness, and switching characteristics is discussed after optimization. Taylor modeling for 3DHkshell optimization is also proposed. For further manufacturing guidance, fitting and boundary curves formulas are provided.
三维Hk超结mosfet的Taylor建模和比较研究,包含宽高比依赖优化
与3D传统SJ (C-SJ)和二维Hk-SJ (2DHk)相比,高k超结(Hk-SJ) mosfet的优化重点是在两种情况下(3DHkcore和3DHkshell)的三维(3D)配置中降低漂移区域的比导通电阻(Ron,sp)。在雪崩击穿和临界损耗约束下,确定了优化后的Ron、sp和设计参数。3DHkcore在800 V击穿电压(BV)下,由于击穿电场(E-field)和冲击电离积分值较低,在小宽高比(AR)下Ron,sp为12.43 mΩcm2,而3DHkshell在大宽高比(AR)下Ron,sp为6.395 mΩcm2,优于3DHkcore和2DHk。优化后讨论了电荷不平衡、温度稳稳性和开关特性的比较研究。提出了3DHkshell优化的Taylor建模方法。为了进一步指导加工,给出了拟合和边界曲线公式。
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来源期刊
Microelectronics Journal
Microelectronics Journal 工程技术-工程:电子与电气
CiteScore
4.00
自引率
27.30%
发文量
222
审稿时长
43 days
期刊介绍: Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.
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