Exploring the optimized Ge/Si heterostructure extended source (ES) Fin-TFETs for improved DC and analog performance

Abstract

Tunnel Field-Effect Transistors (TFETs) have been recognized as a potential alternative for low-power switching devices because of their ability to achieve a superior subthreshold swing (SS) compared to traditional MOSFETs. Nevertheless, point tunneling-based TFETs have major issues, such as reduced on-current (I_on) and elevated SS, which limit their practical application. These issues stem from restricted tunneling space and an inefficient tunneling direction. To overcome these limitations, this work introduces an Extended Source Fin-TFET (ES Fin-TFET) architecture utilizing a Ge/Si heterostructure. The device achieves significant performance improvements by combining point tunneling at the source-channel hetero-junction and line tunneling in the extended source region. The proposed ES Fin-TFET exhibits a high on-current of 1.25 × 10⁻⁵ A while maintaining a low off-current of 1.35 × 10⁻¹⁷ A. The device further demonstrates exceptional DC characteristics, including a threshold voltage (V_T) of 0.28 V, a high on-off current ratio exceeding ∼1 × 10¹², and an average subthreshold slope of 23 mV/decade. Additionally, AC performance analysis of the proposed device reveals a transconductance of 2.5 × 10⁻⁵ S, a gain-bandwidth product of 1.6 × 10¹⁰ Hz, a cut-off frequency of 4.5 × 10¹⁰ Hz, and a transconductance generation factor of 6.9 × 10⁵ V⁻¹, demonstrating its potential for high-performance analog and RF applications.