Low test cost adaptive testing method for high yield IC products

Abstract

The ever-increasing complexity of integrated circuits inevitably leads to high chip test cost. Machine learning techniques can predict chip quality with a small number of test items, but require a similar number of passed and failed chips in the training data. Training a model with high yield chip data results in a large number of test escapes. In order to reduce the test cost and maintain the recognition rate of failed chips, an adaptive testing method based on ensemble learning is proposed. The degree of imbalance in the test data is alleviated by undersampling, and then the test items are filtered based on the model classification effects. Finally, to prevent imbalanced data from disturbing the ensemble learning algorithm, boundary adjustment is used to reduce test escapes. Experimental results using fabricated chips test data show that the proposed method reduces more than 34 % of test items in the face of high yield chips, and the accuracy of the classification of failed chips reaches more than 99 %.