Chenkai Zhang, Huibin Wang, Yiyan Zhang, Lili Zhang, Chunyan Ma
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引用次数: 0
Abstract
In recent years, discrete memristors have garnered significant interest from the scientific community due to their nonlinear and adaptive properties. These characteristics make them ideal for use as nonlinear elements in generating chaotic oscillations. However, the current research on the discrete memristor chaotic map is still focused on constructing it by coupling first-order discrete memristors, and the research on coupling higher-order discrete memristors is relatively limited. This paper presents a novel four-dimensional discrete memristor hyperchaotic map that is coupled with a second-order discrete memristor. Through numerical simulations, we analyze the bifurcation diagram and Lyapunov index diagram of the new map with the change of coupling coefficient and various control parameters. Our findings indicate that the map exists in a hyperchaotic state and demonstrates the coexistence of multiple attractors under varying initial conditions. This results in a rich tapestry of dynamic behaviors and high complexity. Moreover, we have implemented the memristor chaotic map by DSP platform.
期刊介绍:
Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics:
Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.