Simulation and Modeling of Emerging Heterojunction Transistors: Toward Rational Design and Optimization

Abstract

This review summarizes the recent progress in the simulation and modeling of two important types of thin-film heterojunction transistors. Both structures functionally rely on the formation of a lateral p-n junction inside a single source-to-drain channel. However, different extents of vertical overlap between the p- and n-type semiconductor films produce unique switching characteristics of the respective systems. Experimental evidences behind recent theoretical models and the predictive capabilities of these models are illustrated with published examples. Simulation results of multivalued logic (MVL) circuits built with these heterojunction transistors are also discussed to emphasize practical aspects of device modeling for circuit- and system-level optimization.