A 1.62 – 10-Gb/s CDR Using Wide-Range VCO With Linearized KVCO

IF 4 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Dong-Seob Shin;Young-Chan Jang
{"title":"A 1.62 – 10-Gb/s CDR Using Wide-Range VCO With Linearized KVCO","authors":"Dong-Seob Shin;Young-Chan Jang","doi":"10.1109/TCSII.2025.3532628","DOIUrl":null,"url":null,"abstract":"A clock and data recovery (CDR) with a voltage-controlled oscillator (VCO) calibration circuit is proposed for supporting transmission speeds from 1.62 Gbps to 10 Gbps. It has a dual-loop structure for frequency and phase locking while using a VCO based on a ring oscillator to support a wide operating range. The VCO calibration circuitry ensures that the VCO’s gain, kVCO, is set within a consistent range over a wide data rate by adaptively setting the operating frequency range of the VCO based on the frequency of the incoming training pattern. The proposed CDR is implemented by using a 40-nm CMOS process with a voltage supply of 1.2 V. It occupies the area of 0.08mm2 while having power efficiency of 2.5 pJ/bit. The proposed CDR improved the peak-to-peak time jitter of the recovered clock from 51.1ps to 31.25ps at the data rate of 8.1 Gbps by using the VCO calibration circuit. The proposed VCO calibration for the CDR also reduced the distribution of the peak-to-peak time jitter of the recovered clocks between the evaluated chips by 44%.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 3","pages":"474-478"},"PeriodicalIF":4.0000,"publicationDate":"2025-01-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Circuits and Systems II: Express Briefs","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10852518/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
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Abstract

A clock and data recovery (CDR) with a voltage-controlled oscillator (VCO) calibration circuit is proposed for supporting transmission speeds from 1.62 Gbps to 10 Gbps. It has a dual-loop structure for frequency and phase locking while using a VCO based on a ring oscillator to support a wide operating range. The VCO calibration circuitry ensures that the VCO’s gain, kVCO, is set within a consistent range over a wide data rate by adaptively setting the operating frequency range of the VCO based on the frequency of the incoming training pattern. The proposed CDR is implemented by using a 40-nm CMOS process with a voltage supply of 1.2 V. It occupies the area of 0.08mm2 while having power efficiency of 2.5 pJ/bit. The proposed CDR improved the peak-to-peak time jitter of the recovered clock from 51.1ps to 31.25ps at the data rate of 8.1 Gbps by using the VCO calibration circuit. The proposed VCO calibration for the CDR also reduced the distribution of the peak-to-peak time jitter of the recovered clocks between the evaluated chips by 44%.
使用宽范围VCO和线性化KVCO的1.62 - 10gb /s CDR
提出了一种时钟和数据恢复(CDR)与电压控制振荡器(VCO)校准电路,支持1.62 Gbps到10gbps的传输速度。它具有双环结构,用于频率和相位锁定,同时使用基于环形振荡器的压控振荡器来支持较宽的工作范围。VCO校准电路通过根据输入训练模式的频率自适应地设置VCO的工作频率范围,确保VCO的增益kVCO在宽数据速率下设置在一致的范围内。该CDR采用40纳米CMOS工艺,电压为1.2 V。其面积为0.08mm2,功率效率为2.5 pJ/bit。该CDR利用VCO校准电路,在8.1 Gbps的数据速率下,将恢复时钟的峰间时间抖动从51.1ps提高到31.25ps。提出的CDR VCO校准还减少了被评估芯片之间恢复时钟的峰对峰时间抖动分布的44%。
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来源期刊
IEEE Transactions on Circuits and Systems II: Express Briefs
IEEE Transactions on Circuits and Systems II: Express Briefs 工程技术-工程:电子与电气
CiteScore
7.90
自引率
20.50%
发文量
883
审稿时长
3.0 months
期刊介绍: TCAS II publishes brief papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes: Circuits: Analog, Digital and Mixed Signal Circuits and Systems Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic Circuits and Systems, Power Electronics and Systems Software for Analog-and-Logic Circuits and Systems Control aspects of Circuits and Systems.
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