A 16–20 GHz Mixer First Receiver Architecture With Active Inductor-Based Low-Pass Elliptic Filter With High OOB-IIP3 in 180 nm CMOS

Abstract

This article introduces an innovative approach to realize a mixer-first receiver architecture, which comprises an N-path differential architecture realized through a passive-switching network, followed by a novel self-biased active inductor-based filter. This combination allows the circuit to achieve high pass-band to stop-band attenuation and the capability to adjust and achieve the desired bandwidth and occupy less area on-chip while maintaining a high selectivity level and rejecting unwanted signals. A noise-cancelling amplifier is placed between the N-path and active inductor-based low-pass elliptic filter to reduce the noise figure of the receiver. In addition to the filter, a novel self-biased baseband amplifier with a wide bandwidth is realized, followed by a buffer to derive a 50 ohms load. The LO signal generation for the proposed receiver is obtained by implementing a passive balun circuit that operates over a wideband followed by an on-chip polyphase filter and buffer. The proof of concept is validated by implementing a designed receiver with an N-path differential architecture followed by a novel active inductor-based low-pass third-order elliptic filter, which occupies less area and achieves high selectivity compared to a passive inductor based filter on 180-nm CMOS technology. The receiver operates within the frequency range of 16-20 GHz and achieves an instantaneous single sideband (SSB) bandwidth of 160 MHz. The proposed filter achieves a pass-band to stop-band attenuation of 47 dB with a Q of 140. Additionally, the receiver exhibits an in-band compression point at -5 dBm and in-band IIP3 of 4–6 dBm with out-of-band signal linearity greater than 10 dBm.