A Harmonic-Suppressed GaN Power Amplifier Using Artificial Coupled Resonator

IF 2.8 2区工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Pub Date : 2024-11-27 DOI:10.1109/TVLSI.2024.3487002

Letian Guo;Jincheng Zhang;Lihe Nie;Jian Wang;Yong Chen;Junyan Ren;Shunli Ma

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引用次数: 0

Abstract

This brief presents an 11.5–17.5-GHz power amplifier (PA) with 32-dBm output power in a 0.25-

$\mu $

m gallium nitride (GaN) process. Capacitively and inductively coupled resonators are used for impedance matching to achieve a flat in-band power gain and a high out-of-band rejection. Meanwhile, the output matching network provides a second-harmonic suppression to improve the average efficiency within the bandwidth of the PA. The measurements show that the proposed PA exhibits an output power of 31–32.5 dBm and a power gain of more than 10.5 dB from 11.5 to 17.5 GHz. Due to the matching networks providing convenient dc feed and dc block, the chip dimension is only

$2.1\times 1.1$

mm2, corresponding to a power density of 0.77 W/mm2. The proposed PA demonstrates a competitive fractional bandwidth and power density in GaN PA monolithic microwave integrated circuits (MMICs).

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来源期刊

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 工程技术-工程：电子与电气

CiteScore

6.40

自引率

7.10%

发文量

187

审稿时长

3.6 months

期刊介绍： The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.