A 36.8-μW 66 nV/√Hz 85.7 dB-System-SNDR Reconfigurable Single-Channel ExG Acquisition System for Bio-Sensor Modules

IF 5.2 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
Yuke Shen;Jiacheng Liu;Kui Wen;Yanbo Zhang;Yi Shen;Shubin Liu;Zhangming Zhu
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引用次数: 0

Abstract

This paper presents a fully integrated reconfigurable single-channel IC with high energy efficiency for bio-signal acquisition in Internet-of-Medical Things (IoMT) systems. The overall signal chain consists of a capacitively-coupled instrumentation amplifier (CCIA) and a 16-bit delta-sigma ( $\Delta $ $\Sigma $ ) ADC. The ADC is directly driven by the CCIA without a traditional driver stage. The folded path of the first stage in CCIA is sliced for reconfigurable noise levels. In addition, a single-stage floating inverter amplifier (FIA) assisted by the correlated-level-shifting (CLS) technique is employed in the switched-capacitor (SC) $\Delta $ $\Sigma $ modulator for fully dynamic operation with sufficient DC gain. Fabricated in 180-nm CMOS, the CCIA achieves an input-referred noise level ranging from 35.8 to 67 nV/ $\surd $ Hz with a best noise-efficiency factor (NEF) of 5.54. It corresponds to an integrated noise ranging from 0.63 to 1.16 $\mu $ $\text {V}_{\text {rms}}$ (0.5-100 Hz) and 1.93 to 3.51 $\mu $ $\text {V}_{\text {rms}}$ (0.1-3 kHz), respectively. The ADC achieves a peak SNDR of 92.6 dB for a 2.3- $\text {V}_{\text {pp}}$ differential input and can support 16 $\times $ power/BW reconfigurability with ENOB>15 bit. The complete system occupies an active area of 0.56 mm2 and achieves 85.7-dB system SNDR over a 500 Hz BW with an OSR of 128. It consumes 36.8 $\mu $ W from a 1.8-V supply, corresponding to an SNDR-based Schreier FoM of 157 dB. Biological measurement is demonstrated successfully, and the results verify that the proposed IC is applicable to high-quality ExG signal acquisition.
用于生物传感器模块的36.8 μ w 66 nV/√Hz 85.7 dB-System-SNDR可重构单通道ExG采集系统
本文提出了一种用于医疗物联网(IoMT)系统中生物信号采集的全集成、可重构、高能效单通道集成电路。整个信号链由一个电容耦合仪表放大器(CCIA)和一个16位delta-sigma ($\Delta $$\Sigma $) ADC组成。ADC直接由CCIA驱动,无需传统的驱动级。CCIA中第一阶段的折叠路径被切片以实现可重构的噪声水平。此外,在开关电容(SC) $\Delta $$\Sigma $调制器中采用了基于相关电平移位(CLS)技术的单级浮动逆变放大器(FIA),实现了具有足够直流增益的全动态工作。CCIA采用180纳米CMOS工艺制造,其输入参考噪声水平范围为35.8至67 nV/ $\surd $ Hz,最佳噪声效率因子(NEF)为5.54。对应的综合噪声范围分别为0.63 ~ 1.16 $\mu $$\text {V}_{\text {rms}}$ (0.5 ~ 100 Hz)和1.93 ~ 3.51 $\mu $$\text {V}_{\text {rms}}$ (0.1 ~ 3 kHz)。对于2.3- $\text {V}_{\text {pp}}$差分输入,ADC的峰值SNDR可达92.6 dB,并支持16 $\times $功率/BW可重构性,使用ENOB>15位。整个系统占用0.56 mm2的有效面积,在500 Hz BW下实现85.7 db的系统SNDR, OSR为128。它从1.8 v电源消耗36.8 $\mu $ W,对应于基于sndr的157 dB的Schreier FoM。实验成功地进行了生物测量,结果验证了所提出的集成电路适用于高质量的ExG信号采集。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Transactions on Circuits and Systems I: Regular Papers
IEEE Transactions on Circuits and Systems I: Regular Papers 工程技术-工程:电子与电气
CiteScore
9.80
自引率
11.80%
发文量
441
审稿时长
2 months
期刊介绍: TCAS I publishes regular papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes: - Circuits: Analog, Digital and Mixed Signal Circuits and Systems - Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic - Circuits and Systems, Power Electronics and Systems - Software for Analog-and-Logic Circuits and Systems - Control aspects of Circuits and Systems.
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