A Histogram-Based Calibration Algorithm of Capacitor Mismatch for SAR ADCs

IF 2.8 2区工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Pub Date : 2024-10-29 DOI:10.1109/TVLSI.2024.3481993

Hui Hu;Bingbing Yao;Yi Shan;Lei Qiu

引用次数: 0

Abstract

The conversion accuracy of successive approximation register (SAR) analog-to-digital converter (ADC) is mainly affected by the capacitor mismatch. In this brief, a histogram-based calibration technique is proposed, which does not require any additional analog circuitry. In this work, the method of partial fitting is used to detect irregular code densities, and construct a cost function to update the weight recursively. The prototype of the calibration is verified with a 12-bit SAR ADC manufactured in 28-nm standard CMOS process. At the sampling rate 50 MS/s, the measurement results indicate that the maximum spurious-free dynamic range (SFDR) can be improved from 77.26 to 88.26 dB, using 10.6 fJ/conversion-step, including reference voltage buffer, with a low-frequency input signal.

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来源期刊

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 工程技术-工程：电子与电气

CiteScore

6.40

自引率

7.10%

发文量

187

审稿时长

3.6 months

期刊介绍： The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.