Editorial: Renewed Excellence for 2025–2026

IF 2.8 2区工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Pub Date : 2025-02-25 DOI:10.1109/TVLSI.2024.3520396

Mircea R. Stan

引用次数: 0

Abstract

I am happy and honored to have been reappointed as Editor in Chief (EiC) for the IEEE Transactions on VLSI Systems (TVLSI) for another two-year term. As I continue my efforts to improve the quality of the journal, I am grateful for the renewed trust placed in me by the three IEEE sponsoring societies (CASS, SSCS and CS) and by the VLSI community at large. Contrary to a feared slowdown due to increased difficulties with scaling, the field of Very Large Scale Integration (VLSI) has actually grown at an increasingly fast rate as it provides the hardware backbone for the insatiable AI applications which are taking over the world. The H100/200 GPUs, which are essential for AI training, are the largest “conventional” integrated circuits (IC) with 80 billion transistors, while the wafer-scale WSE2/3, which can provide significant improvements in AI inference, are absolute behemoths with 4 trillion transistors! Mr. Moore can be proud there in heaven for what our industry is able to deliver!

查看原文本刊更多论文

社论：2025-2026年再创辉煌

我很高兴也很荣幸再次被任命为IEEE超大规模集成电路系统学报（TVLSI）的主编（EiC），任期为两年。在我继续努力提高期刊质量的同时，我非常感谢IEEE的三个赞助协会（CASS， SSCS和CS）以及整个VLSI社区对我的重新信任。与由于扩容困难增加而导致的担忧放缓相反，超大规模集成电路（VLSI）领域实际上以越来越快的速度增长，因为它为无法满足的AI应用程序提供了硬件支柱，这些应用程序正在接管世界。对于人工智能训练至关重要的H100/200 gpu是最大的“传统”集成电路（IC），拥有800亿个晶体管，而可以在人工智能推理方面提供显着改进的晶圆级WSE2/3是拥有4万亿个晶体管的绝对庞然大物！摩尔先生可以在天堂为我们的行业所能提供的东西感到骄傲！

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文求助全文

来源期刊

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 工程技术-工程：电子与电气

CiteScore

6.40

自引率

7.10%

发文量

187

审稿时长

3.6 months

期刊介绍： The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.