{"title":"A S-/C-Band 6-bit Passive Phase Shifter With an X-Shape Merged 180° and 90° Cell","authors":"Genyin Ma;Fanyi Meng","doi":"10.1109/LMWT.2024.3511920","DOIUrl":null,"url":null,"abstract":"This letter presents a 6-bit passive phase shifter (PS) for 3.7–5.3-GHz (S-/C-Band) phase-array communications. The PS adopts several cascaded switchable phase-shifting cells, in topologies of <inline-formula> <tex-math>$\\Pi $ </tex-math></inline-formula>-type, T-type, and the proposed X-shape structure. The 180° and 90° phase-shifting cells are merged and co-designed, whose switch configuration resembles the X-shape. It allows the reduction of one switch transistor and its associated insertion losses in the RF path. The proposed 6-bit PS is designed and fabricated in a 55-nm bulk CMOS. The measured results reveal an insertion loss (IL) of 8.5–9.5 dB, a root-mean-square (rms) phase error of 3.50°–5.15°, and an rms amplitude error of 0.23–0.51 dB. The chip occupies an area of 0.80 mm2 and consumes negligible power.","PeriodicalId":73297,"journal":{"name":"IEEE microwave and wireless technology letters","volume":"35 2","pages":"193-196"},"PeriodicalIF":0.0000,"publicationDate":"2024-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE microwave and wireless technology letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10789203/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"0","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
This letter presents a 6-bit passive phase shifter (PS) for 3.7–5.3-GHz (S-/C-Band) phase-array communications. The PS adopts several cascaded switchable phase-shifting cells, in topologies of $\Pi $ -type, T-type, and the proposed X-shape structure. The 180° and 90° phase-shifting cells are merged and co-designed, whose switch configuration resembles the X-shape. It allows the reduction of one switch transistor and its associated insertion losses in the RF path. The proposed 6-bit PS is designed and fabricated in a 55-nm bulk CMOS. The measured results reveal an insertion loss (IL) of 8.5–9.5 dB, a root-mean-square (rms) phase error of 3.50°–5.15°, and an rms amplitude error of 0.23–0.51 dB. The chip occupies an area of 0.80 mm2 and consumes negligible power.