An Offset Compensated Charge Transfer Pre-Sensing Bitline Sense Amplifier

IF 4.6 1区工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Journal of Solid-state Circuits Pub Date : 2025-02-10 DOI:10.1109/JSSC.2025.3531904

Kyeongtae Nam;Dongil Lee;Kyuchang Kang;Sang-Yun Kim;Changyoung Lee;Hyunchul Yoon;Donggeon Kim;Bokyeon Won;Jae-Joon Song;Jaehyuk Kim;Incheol Nam;Young-Hun Seo;Jeong-Don Ihm;Changsik Yoo;Sangjoon Hwang

{"title":"An Offset Compensated Charge Transfer Pre-Sensing Bitline Sense Amplifier","authors":"Kyeongtae Nam;Dongil Lee;Kyuchang Kang;Sang-Yun Kim;Changyoung Lee;Hyunchul Yoon;Donggeon Kim;Bokyeon Won;Jae-Joon Song;Jaehyuk Kim;Incheol Nam;Young-Hun Seo;Jeong-Don Ihm;Changsik Yoo;Sangjoon Hwang","doi":"10.1109/JSSC.2025.3531904","DOIUrl":null,"url":null,"abstract":"A bitline sense amplifier (BLSA) with offset compensated charge transfer pre-sensing (OC-CTPS) scheme is implemented using 14-nm dynamic random access memory (DRAM) process. The offset compensation (OC) is operated by diode connection without additional size overhead for BLSA. The average fail bit count (FBC) attributed to a mismatch of charge transfer (CT) transistor was reduced by 94% after performing OC. Furthermore, the proposed OC-CTPS BLSA accomplished 250 and 500 ps of CT time (<inline-formula> <tex-math>$t_{\\mathrm {CT}}$ </tex-math></inline-formula>) window, representing the <inline-formula> <tex-math>$t_{\\mathrm {CT}}$ </tex-math></inline-formula> region where the FBC is lower than the standard FBC, at the temperatures of <inline-formula> <tex-math>$- 25~^{\\circ }$ </tex-math></inline-formula>C and <inline-formula> <tex-math>$100~^{\\circ }$ </tex-math></inline-formula>C, respectively, without modifying any operations for CT. Moreover, our approach ensures robust and stable sensing even at operating voltages as low as 0.75 V, compared to conventional latch-based OC BLSA.","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"60 4","pages":"1359-1367"},"PeriodicalIF":4.6000,"publicationDate":"2025-02-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal of Solid-state Circuits","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10878507/","RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}

引用次数: 0

Abstract

A bitline sense amplifier (BLSA) with offset compensated charge transfer pre-sensing (OC-CTPS) scheme is implemented using 14-nm dynamic random access memory (DRAM) process. The offset compensation (OC) is operated by diode connection without additional size overhead for BLSA. The average fail bit count (FBC) attributed to a mismatch of charge transfer (CT) transistor was reduced by 94% after performing OC. Furthermore, the proposed OC-CTPS BLSA accomplished 250 and 500 ps of CT time (

$t_{\mathrm {CT}}$

) window, representing the

$t_{\mathrm {CT}}$

region where the FBC is lower than the standard FBC, at the temperatures of

$- 25~^{\circ }$

C and

$100~^{\circ }$

C, respectively, without modifying any operations for CT. Moreover, our approach ensures robust and stable sensing even at operating voltages as low as 0.75 V, compared to conventional latch-based OC BLSA.

查看原文本刊更多论文

求助全文

约1分钟内获得全文求助全文

来源期刊

IEEE Journal of Solid-state Circuits 工程技术-工程：电子与电气

CiteScore

11.00

自引率

20.40%

发文量

351

审稿时长

3-6 weeks

期刊介绍： The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.