A Low-Distortion Bootstrapped Switch Based on Parasitic Capacitance Reduction Techniques
IF 0.7
4区 工程技术
Q4 ENGINEERING, ELECTRICAL & ELECTRONIC
引用次数: 0
Abstract
This letter presents a low-distortion bootstrapped switch for improving sampling network linearity. The dynamically driven gate approach and the dynamically driven deep N-well technique are proposed to reduce the parasitic capacitance at crucial nodes. Simulated in a 180 nm CMOS process, the proposed switch achieves a total harmonic distortion (THD) of −101.3 dB at an 80 MHz sampling frequency. This is a 20.7 dB increase in THD over the conventional switch.
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来源期刊
Electronics Letters
工程技术-工程：电子与电气
CiteScore
2.70
自引率
0.00%
发文量
268
审稿时长
3.6 months
期刊介绍：
Electronics Letters is an internationally renowned peer-reviewed rapid-communication journal that publishes short original research papers every two weeks. Its broad and interdisciplinary scope covers the latest developments in all electronic engineering related fields including communication, biomedical, optical and device technologies. Electronics Letters also provides further insight into some of the latest developments through special features and interviews.
Scope
As a journal at the forefront of its field, Electronics Letters publishes papers covering all themes of electronic and electrical engineering. The major themes of the journal are listed below.
Antennas and Propagation
Biomedical and Bioinspired Technologies, Signal Processing and Applications
Control Engineering
Electromagnetism: Theory, Materials and Devices
Electronic Circuits and Systems
Image, Video and Vision Processing and Applications
Information, Computing and Communications
Instrumentation and Measurement
Microwave Technology
Optical Communications
Photonics and Opto-Electronics
Power Electronics, Energy and Sustainability
Radar, Sonar and Navigation
Semiconductor Technology
Signal Processing
MIMO
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