Novel three-dimensional stacked capacitorless DRAM architecture using partially etched nanosheets for high-density memory applications

Abstract

This study presents a novel three-dimensional stacked capacitorless dynamic random access memory (1T-DRAM) architecture, designed using a partially etched nanosheet (PE NS) to overcome the scaling limitations of traditional DRAM designs. By leveraging the floating body effect, this architecture eliminates the need for capacitors, thereby improving integration density and memory performance. Through Sentaurus technology computer-aided design simulations, we compare the PE NS 1T-DRAM device with a conventional NS 1T-DRAM device to evaluate its effectiveness. The results reveal superior retention time (RT) and sensing margin (SM) performance of the proposed PE NS 1T-DRAM device, surpassing the memory criteria outlined by the International Roadmap for Devices and Systems, which requires an RT exceeding 64 ms at 358 K. This enhanced performance of the proposed device is attributed to its extension region, which functions as a potential well for efficient hole storage, as well as the suppression of Shockley‒Read‒Hall recombination. The PE NS 1T-DRAM device also demonstrates robustness to disturbances, maintaining over 89% of its SM and RT under diverse conditions. This superiority is again attributed to its extension region, which minimizes the effects of current flow and electrostatic potential rise. These results highlight the potential of the PE NS 1T-DRAM design for future high-density memory applications.