A broadband low-noise VCO circuit based on a hybrid analog-digital control loop

Abstract

To meet the need for high-performance, broadband PLL frequency synthesizers in modern RF transceivers, this paper designs a broadband, low-noise VCO circuit using 130 nm SiGe BiCMOS technology. The VCO system employs multi-core integration and switched-capacitor arrays, integrating seven narrowband VCOs for full wideband frequency coverage. To mitigate phase noise exacerbated by VCO output swing fluctuations with frequency and PVT, a digital-analog hybrid control loop is designed for dynamic swing calibration. A novel amplitude control module utilizes current mirroring to stabilize VCO cross-coupled transistors, replacing tail current sources, enhancing calibration accuracy and reducing phase noise. The VCO circuit was tested on a lock-in frequency synthesizer chip at room temperature, and the test results show that the tuning frequency range of the VCO system is 7.22–15.12 GHz, the absolute value of the voltage-controlled gain is less than 200 MHz/V, and the phase noise at the 14.5 GHz carrier with 1 MHz frequency deviation is −116.61 dBc/Hz.