A UWB vector synthesis phase shifter based on an improved current array control circuit and an RC-RL polyphase filter

Abstract

This paper presents the design of a 2-18 GHz 6-bit vector synthesis phase shifter based on a $0.18\mu m$ RF CMOS process, featuring low root mean square (RMS) phase and gain errors. An RC-RL polyphase filter (PPF) is utilized to generate two pairs of in-phase/quadrature (I/Q) signals with high orthogonal precision across a wide frequency band, while insertion loss is minimized by reducing inter-stage mismatch. The I/Q signals are then fed into an analog adder based on Gilbert cell architecture. The tail current ratio for the I/Q paths is adjusted using a current array control circuit to achieve a 6-bit phase resolution for signal phase shifts between 0°and 360°. This current array independently controls the currents of the I/Q paths by duplicating two sets of current branches, ensuring that both currents closely approximate the theoretical ratio. This approach enhances the phase shifting accuracy and reduces gain errors in the phase shifter. Simulation results demonstrate that the phase shifter achieves a maximum gain of -1.2 dB at 6.48 GHz, with an RMS gain error of less than 0.83 dB and an RMS phase error of less than 5°across all 64 phase states within the 2-18 GHz range. With a supply voltage of 1.8 V, the total current is 4.2 mA, and the total chip size is 2307 × $723\mu m$ ${}^2$.