{"title":"A 32-channels analog multiplexer with crosstalk compensation technique in 45 nm CMOS","authors":"Jie Wu, Qiao Meng, Gaojing Li, Sha Li, Shaocong Guo, Yujia Huang","doi":"10.1016/j.mejo.2024.106496","DOIUrl":null,"url":null,"abstract":"<div><div>This paper presents a multiplexer that is capable of modulating 32-channels analog signal, which is a promising approach to simplify transmission system. An 8-channels prototype multiplexer with integral functionality and non-ideal factors is fabricated in 45 nm CMOS with area of 0.59 mm<sup>2</sup>, and verified in a QAM-256 system with 1.2V supply. The proposed multiplexer employs a semi-tree structure to achieve compromise between scale and speed. To relieve adverse effect caused by crosstalk between channels, the auxiliary reset compensation circuit combined with a dedicated timing sequence is utilized. Additionally, the proposed high-speed gate voltage bootstrap switch and high-bandwidth input buffer ensure that the signal remains linear during transmission. In the experimental result, the multiplexer can achieve a pulse width of at least 77ps in 8Gbps code rate, and the root mean square error due to nonlinearity between differential input and output is 1.869 %. The error vector magnitude (EVM) obtained by analyzing output versus input of multiplexer is less than 1.413 %.</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":"156 ","pages":"Article 106496"},"PeriodicalIF":1.9000,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1879239124002005","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a multiplexer that is capable of modulating 32-channels analog signal, which is a promising approach to simplify transmission system. An 8-channels prototype multiplexer with integral functionality and non-ideal factors is fabricated in 45 nm CMOS with area of 0.59 mm2, and verified in a QAM-256 system with 1.2V supply. The proposed multiplexer employs a semi-tree structure to achieve compromise between scale and speed. To relieve adverse effect caused by crosstalk between channels, the auxiliary reset compensation circuit combined with a dedicated timing sequence is utilized. Additionally, the proposed high-speed gate voltage bootstrap switch and high-bandwidth input buffer ensure that the signal remains linear during transmission. In the experimental result, the multiplexer can achieve a pulse width of at least 77ps in 8Gbps code rate, and the root mean square error due to nonlinearity between differential input and output is 1.869 %. The error vector magnitude (EVM) obtained by analyzing output versus input of multiplexer is less than 1.413 %.
期刊介绍:
Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems.
The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc.
Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.