MingJie Li , MingChao Jian , HuanLin Xie , JiaJun Yang , JiaWei Tian , Bo Sun , ChunBing Guo
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引用次数: 0
Abstract
This paper presents a 2-MHz BW 93.2-dB SFDR 2nd-order hybrid noise shaping SAR ADC with error-feedback (EF) and cascaded-integrator-feed-forward (CIFF) structure. Compared to a conventional first-order hybrid structure, this work introduces two zeros and two poles, achieving a sharper NTF. These zeros and poles are determined by the capacitance ratio, thereby maintaining great PVT robustness. The proposed NS-SAR ADC employs second-order passive integrators assisted by a unity-gain buffer. This configuration avoids the use of high-performance OTA, reduces design difficulty, and is friendly to process scaling. The prototype 9-bit NS-SAR ADC is fabricated in a 65 nm CMOS technology, measuring a signal-to-noise ratio and distortion ratio (SNDR) of 74.0 dB and a spurious-free dynamic range (SFDR) of 93.2 dB at a sampling rate of 32 MHz. The bandwidth (BW) is 2 MHz under an oversampling ratio (OSR) of 8. The Schreier Figure-of-merit (FoMs) based on SNDR is 170.14 dB.
期刊介绍:
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