Investigation on electrical parameters in nanowire FET and nanosheet FET including trap charges and its circuit applications

Abstract

In this work, we have reported the DC, AC, and linearity parameters of Nanowire FET (NWFET) and Nanosheet FET (NSFET) with and without considering the interface trap charges (ITCs). The analysis is presented for two different ITCs distributions like Uniform and Gaussian. It is seen that the presence of ITCs leads to degraded drain current and subthreshold swing (SS) for both the FETs. However, NSFET has improved SS and I_ON/I_OFF ratio than NWFET even in the presence of ITCs. The SS values are 65.82 and 62.75 mV/decade, respectively, and I_ON/I_OFF ratio are 3.29 × 10⁸ and 1.12 × 10⁹, respectively, for NW and NS FETs. The presence of trap charges degrades the RF/analog behavior of the devices and opposite trend is obtained in linearity for both the devices. Furthermore, the circuit application is shown by implementing the digital inverter using NSFET at various widths. It is seen that voltage gain are 8.78 and 13.79 for width of 10 and 30 nm, respectively, in NSFET.