4H–SiC double trench MOSFET with Inverted-T groove and integrated Schottky barrier diode

IF 2.7 Q2 PHYSICS, CONDENSED MATTER

Micro and Nanostructures Pub Date : 2025-02-01 DOI:10.1016/j.micrna.2024.208052

Yue Zhang , Song Bai , Guran Chen , Teng Zhang , Runhua Huang , Shiyan Li , Yong Yang

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Abstract

In this letter, we propose an improved 4H–SiC double trench MOSFET with Inverted-T groove and integrated Schottky barrier diode (ITSBD-MOS). The device features an Inverted-T groove beneath the gate electrode and the integrated SBD locates on the bottom of source trench. Numerical simulations have been completed to study the proposed device. The maximum electric field in gate oxide of ITSBD-MOS is suppressed to below 3 MV/cm, while the turn-on voltage in reverse conduction state is lowered to 1.23 V. Besides, due to the introduction of Inverted-T groove, the gate-to-drain charge of the ITSBD-MOS is significantly reduced while the short-circuit capability is obviously improved. The calculated high-frequency figure of merit (HF-FOM = R_on,sp × Q_gd) of ITSBD-MOS is tremendously decreased compared with that of DT-MOS, which suggests that ITSBD-MOS is a promising candidate for external-diode free power electronics applications and high-frequency operations.

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带反t型槽和集成肖特基势垒二极管的4H-SiC双沟槽MOSFET

在这篇文章中，我们提出了一种改进的4H-SiC双沟槽MOSFET，具有倒t槽和集成肖特基势垒二极管（ITSBD-MOS）。该器件在栅电极下方有一个倒t型槽，集成SBD位于源槽底部。对该装置进行了数值模拟研究。将ITSBD-MOS栅极氧化物中的最大电场抑制到3 MV/cm以下，同时将反导状态下的导通电压降低到1.23 V。此外，由于引入了倒t型槽，ITSBD-MOS的栅极漏极电荷显著降低，短路能力明显提高。与DT-MOS相比，ITSBD-MOS的计算高频优值（HF-FOM = Ron,sp × Qgd）大大降低，这表明ITSBD-MOS是无外部二极管电力电子应用和高频操作的理想候选者。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Micro and Nanostructures

CiteScore

6.50

自引率

0.00%

发文量