DAGNN-RE: Directed acyclic graph neural network for functional reverse engineering of gate-level netlist

IF 2.2 3区 工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Zongtai Li, Liang Yang, Mian Lou
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引用次数: 0

Abstract

Functional reverse engineering of gate-level netlist is a crucial means for detecting the functionality of third-party IPs and enhancing IC security. The state-of-the-art method GNN-RE accurately identifies sub-circuits in flattened netlists but struggles to generalize effectively to unseen functionally-equivalent structurally-different netlists because it only extracts the structural features of the netlist. This work introduces an innovative GNN-based approach DAGNN-RE, that can accurately identify sub-circuits in combinational netlists and exhibits superior generalization capabilities for functionally-equivalent structurally-different netlists. The improved performance rests on learning both the structural and functional attributes of netlist instead of merely increasing the amount of training data. Specifically, for structural attributes, DAGNN-RE employs the partial order in message passing of Directed Acyclic Graph Neural Network (DAGNN) to extract the inherent DAG nature of netlist structure. For functional attributes, DAGNN-RE integrates the boolean function of logic gates and the time series update function following the propagation of the circuit signals to extract functionality at the sub-circuit level. Furthermore, the signal probability of logic gates is incorporated to boost the capture of functional attributes. We constructed four extra custom datasets based on the GNN-RE open-sourced dataset to test the accuracy, scalability, and generalization ability. The experimental results show that DAGNN-RE outperforms GNN-RE across all five datasets, suggesting that our approach offers more practical than GNNRE. We derived another five custom datasets from GNN-RE open-source RTL to validate the application in equivalent timing scenarios. The experimental results show that DAGNN-RE still outperforms GNN-RE, demonstrating that our approach maintains a significant advantage even for netlists that are timing and functionally equivalent but structurally different.
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来源期刊
Integration-The Vlsi Journal
Integration-The Vlsi Journal 工程技术-工程:电子与电气
CiteScore
3.80
自引率
5.30%
发文量
107
审稿时长
6 months
期刊介绍: Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.
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