Temperature sensitivity of GaSb/Si/SiGe heterojunction vertical nanowire junctionless field-effect transistor for logic circuit applications

Abstract

In this article, a GaSb/Si/SiGe heterojunction vertical nanowire (V-NW) junctionless field-effect transistors (JFETs) under the influence of elevated temperature have been investigated. The vertical nanowire configuration with a GaSb source increases the source-channel barrier height, thus reducing the short-channel effect at elevated temperatures (T = 300K, 400K, and 500K). Elevated temperature also impacts the energy band diagram and tunnelling width. The temperature shows the impact on thermal voltage (Vt), density of states (NC and NV) and intrinsic carrier concentrations (ni). Moreover, even at elevated temperatures, the OFF-state current for GaSb/Si/SiGe HT V-NW JLFETs only increased by one order of magnitude. In addition to electron velocity, the electric field is also affected by elevated temperatures to increase the kinetic energy of the electrons, leading to faster movement and a stronger electric field. Analogue performance parameters like transconductance (gm), transconductance gain factor (gm/Ids), cutoff frequency (ft) and intrinsic delay (τ) are used as figures of merit to optimize the GaSb/Si/SiGe HT V-NW JLFET for logic circuits.