{"title":"A deep oxide trench SOI-LIGBT with self-driving PMOS for improved reliability","authors":"Weizhong Chen, Xiangwei Zeng, Yuting He, Ao Wu","doi":"10.1016/j.mejo.2025.106584","DOIUrl":null,"url":null,"abstract":"<div><div>A novel SOI-LIGBT integrating Self-driving PMOS (SDP) is proposed. The SDP is introduced at the Emitter side which is consists of Deep Oxide Trench (DOT) and lowly Doped P-buried (DP). For the SDP, the Auxiliary Gate (AG) which is shortly connected with the Emitter acts as the gate, and the lowly Doped P-buried (DP), N-drift and P-well act as the source, substrate and drain, respectively. The SDP is designed without additional circuit control, moreover the SDP is driven adaptively along with the working mode of the LIGBT. At the forward conduction, the SDP with <em>V</em><sub>GS</sub> > <em>V</em><sub>th</sub> is turned off and SDP is gradually turned on along with the increasing <em>V</em><sub>CE</sub>, the N-drift substrate of the SDP creates an electrical channel for hole carriers to let the hole currents divert. At the turning off, the SDP with <em>V</em><sub>GS</sub> < <em>V</em><sub>th</sub> is turned on again to extract the excessive hole carriers. Hence, the PDP-LIGBT achieves superior short reliability. As a result, the short circuit tolerance time of PDP-LIGBT reaches to 6.98 μs, and the <em>E</em><sub>OFF</sub> is decreased by 18.5 % and 22.2 % under the same <em>V</em><sub>ON</sub> of 1.22 V when compared with the DOT-LIGBT, and DP-LIGBT.</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":"157 ","pages":"Article 106584"},"PeriodicalIF":1.9000,"publicationDate":"2025-01-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1879239125000335","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
A novel SOI-LIGBT integrating Self-driving PMOS (SDP) is proposed. The SDP is introduced at the Emitter side which is consists of Deep Oxide Trench (DOT) and lowly Doped P-buried (DP). For the SDP, the Auxiliary Gate (AG) which is shortly connected with the Emitter acts as the gate, and the lowly Doped P-buried (DP), N-drift and P-well act as the source, substrate and drain, respectively. The SDP is designed without additional circuit control, moreover the SDP is driven adaptively along with the working mode of the LIGBT. At the forward conduction, the SDP with VGS > Vth is turned off and SDP is gradually turned on along with the increasing VCE, the N-drift substrate of the SDP creates an electrical channel for hole carriers to let the hole currents divert. At the turning off, the SDP with VGS < Vth is turned on again to extract the excessive hole carriers. Hence, the PDP-LIGBT achieves superior short reliability. As a result, the short circuit tolerance time of PDP-LIGBT reaches to 6.98 μs, and the EOFF is decreased by 18.5 % and 22.2 % under the same VON of 1.22 V when compared with the DOT-LIGBT, and DP-LIGBT.
期刊介绍:
Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems.
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