Three-dimensional design of SOI LDMOS with high-k film trench and L-shaped gate

Abstract

Based on silicon-on-insulator (SOI) technology, a lateral double-diffused metal-oxide-semiconductor (LDMOS) with high-k film trench (HKT) and L-shaped gate (LG) is proposed in this work. The HK film surrounding the oxide trench can adjust the electric flux flow and the trench/drift interface electric field distribution, which improves both of breakdown voltage (BV) and specific on-resistance (R_on,sp). Moreover, the LG can modulate the three-dimensional (3-D) surface electric field distribution in the xoz-plane, which prevents the premature breakdown at gate end for the device. In the xoz-plane, the LG dramatically enlarges the current channel width. Correspondingly, the drain needs to expand the area in top view, which can provide sufficient conductive path to match the widened current channel. In a consequence, R_on,sp significantly decreases. Therefore, BV and R_on,sp are both effectively improved for the proposed device. The 3-D simulation results show that in comparison with the conventional HKT SOI LDMOS (BV ∼ 255 V, R_on,sp ∼ 8.72 mΩ∙cm²), BV (287 V) is increased by 11.3 % while R_on,sp (5.37 mΩ∙cm²) is reduced by 38 % for the proposed structure, which results in a sufficiently high Figure-of-Merit (FOM, = BV²/R_on = 15.3 MW/cm²). In addition, the device performance characteristics (e.g. temperature and transconductance) are also discussed in this work.