Design of self-recovering low-cost multiple-node-upset-tolerant latch

Abstract

The radiation effects induced by particles in the radiation environments are the serious threat to the normal operation of electronic devices, and the single event effect can lead to soft errors in latches and destroy the stored data. With the technology scaling down, the Multiple Node Upset (MNU) induced by single event charge sharing has become the emerging reliability challenge of radiation-hardened designs. The radiation performance of latches can be improved by adding enough redundant nodes through spatial redundancy technique, but the overhead is significant and unacceptable. Therefore, in this work a Low-Cost MNU-Tolerant (LCMT) latch is proposed. By adding two redundant nodes to form the feedback loops and combining with layout-level techniques, the proposed LCMT latch can self-recover from MNU. SPICE simulations and 3D TCAD mixed-mode simulations were carried out with 65 nm commercial technology model to verify the robustness of the proposed latch to MNU. Compared with some existing radiation-hardened latches, the proposed LCMT latch has comparable or higher Single Event Upset (SEU) tolerance, lowest delay, lower power consumption, lower Power Delay Product (PDP), and lower delay sensitivity to Process, Voltage, and Temperature (PVT) variations. Compared with the same type of MNU-tolerant latch designs, the proposed LCMT latch saves about 60 % area overhead and about 46 % PDP.