The art of temporal decoupling

IF 2.2 3区工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

Integration-The Vlsi Journal Pub Date : 2024-12-10 DOI:10.1016/j.vlsi.2024.102314

Niko Zurstraßen , Ruben Brandhofer , José Cubero-Cascante , Nils Bosbach , Lukas Jünger , Rainer Leupers

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引用次数: 0

Abstract

Virtual Platforms (VPs) and Full-System Simulators (FSSs) are essential tools in modern Multiprocessor System on A Chip (MPSoC) development. Over the past two decades, the speed of these simulations has not kept pace with the increasing complexity of the systems being simulated, highlighting the need for faster simulation techniques. One widely used approach is Temporal Decoupling (TD), which allows parts of the simulation to run unsynchronized with the rest of the system for a period called the quantum. While a larger quantum improves simulation performance by reducing the number of synchronization and context switches, it also raises the risk of causality errors, leading to inaccuracies. Consequently, users of TD simulations may struggle to find the optimal quantum that balances accuracy and performance. In practice, the quantum is often chosen based on empirical knowledge, which, though sometimes effective, lacks a solid theoretical basis. This work addresses this gap by offering analytical estimations and deeper insights into the effects of TD. We also validate the proposed models using TD simulations in SystemC and gem5.

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时间解耦的艺术

虚拟平台（vp）和全系统模拟器（fss）是现代多处理器单片系统（MPSoC）开发中必不可少的工具。在过去的二十年里，这些模拟的速度并没有跟上被模拟系统日益增加的复杂性，这凸显了对更快的模拟技术的需求。一种广泛使用的方法是时间解耦（TD），它允许部分模拟与系统的其余部分在称为量子的一段时间内不同步运行。虽然更大的量子通过减少同步和上下文切换的数量来提高模拟性能，但它也增加了因果关系错误的风险，从而导致不准确。因此，TD模拟的用户可能很难找到平衡精度和性能的最佳量子。在实践中，量子的选择往往基于经验知识，虽然有时有效，但缺乏坚实的理论基础。这项工作通过对TD的影响提供分析估计和更深入的见解来解决这一差距。我们还在SystemC和gem5中使用TD仿真验证了所提出的模型。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Integration-The Vlsi Journal 工程技术-工程：电子与电气

CiteScore

3.80

自引率

5.30%

发文量

107

审稿时长

6 months

期刊介绍： Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.