A five-level nested neutral point-clamped inverter topology

IF 1.7 4区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Desmond O. Obe, Chinedu T. Obe, Charles I. Odeh, Emeka S. Obe
{"title":"A five-level nested neutral point-clamped inverter topology","authors":"Desmond O. Obe,&nbsp;Chinedu T. Obe,&nbsp;Charles I. Odeh,&nbsp;Emeka S. Obe","doi":"10.1049/pel2.12793","DOIUrl":null,"url":null,"abstract":"<p>Classical five-level nested neutral point-clamped (5L NNPC) inverter-leg is a hybrid of the flying-capacitor and diode-clamped 5-L inverter-leg configurations. Though uniform reduced voltage stress on the constituting switches is evident in 5L NNPC inverter-leg, trails of the drawbacks of diode-clamping concept still exist. Compared with the classical 5L NNPC inverter, the state-of-the-art diode-free 5L NNPC inverter involves no passive power switches and has low conduction losses. However, in this 5L NNPC inverter, two of the eight active switches have blocking voltage rating of 1/2 of the input voltage. Considering this limiting topological feature, an inverter-leg for 5L NNPC inverter is presented in this paper. In the proposed 5L NNPC inverter-leg, only one switch has voltage stress of 1/2 of the input voltage. This reduced voltage stress has inverter cost and loss implications. The performances and competitiveness of the 5L NNPC inverter were analysed in detail and demonstrated with a prototype. The blocking voltages of all the constituting power switches; profiles of the flying-capacitor voltages; and FFT spectrum of line voltage waveform were experimentally obtained. Experimental deactivation and activation of the inverter's capacitor voltages balancing scheme were typified for varying modulation index values.</p>","PeriodicalId":56302,"journal":{"name":"IET Power Electronics","volume":"18 1","pages":""},"PeriodicalIF":1.7000,"publicationDate":"2024-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/pel2.12793","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IET Power Electronics","FirstCategoryId":"5","ListUrlMain":"https://onlinelibrary.wiley.com/doi/10.1049/pel2.12793","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
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Abstract

Classical five-level nested neutral point-clamped (5L NNPC) inverter-leg is a hybrid of the flying-capacitor and diode-clamped 5-L inverter-leg configurations. Though uniform reduced voltage stress on the constituting switches is evident in 5L NNPC inverter-leg, trails of the drawbacks of diode-clamping concept still exist. Compared with the classical 5L NNPC inverter, the state-of-the-art diode-free 5L NNPC inverter involves no passive power switches and has low conduction losses. However, in this 5L NNPC inverter, two of the eight active switches have blocking voltage rating of 1/2 of the input voltage. Considering this limiting topological feature, an inverter-leg for 5L NNPC inverter is presented in this paper. In the proposed 5L NNPC inverter-leg, only one switch has voltage stress of 1/2 of the input voltage. This reduced voltage stress has inverter cost and loss implications. The performances and competitiveness of the 5L NNPC inverter were analysed in detail and demonstrated with a prototype. The blocking voltages of all the constituting power switches; profiles of the flying-capacitor voltages; and FFT spectrum of line voltage waveform were experimentally obtained. Experimental deactivation and activation of the inverter's capacitor voltages balancing scheme were typified for varying modulation index values.

Abstract Image

五电平嵌套式中性点钳位逆变器拓扑结构
经典的五电平嵌套中立点箝位(5L NNPC)逆变器支腿是飞行电容器和二极管箝位的5-L逆变器支腿配置的混合。虽然在5L NNPC逆变器腿上构成开关的电压应力均匀降低,但二极管箝位概念的缺点仍然存在。与经典的5L NNPC逆变器相比,最先进的无二极管5L NNPC逆变器不涉及无源功率开关,导通损耗低。然而,在这个5L NNPC逆变器中,八个主动开关中的两个具有输入电压的1/2的阻塞额定电压。考虑到这一限制拓扑特征,本文提出了一种5L NNPC逆变器的逆变腿。在所提出的5L NNPC逆变腿中,只有一个开关的电压应力为输入电压的1/2。这种降低的电压应力具有逆变器成本和损耗的含义。详细分析了5L NNPC逆变器的性能和竞争力,并通过样机进行了验证。各构成电源开关的阻断电压;飞电容电压分布图;实验得到了线电压波形的FFT谱。对不同调制指标值下逆变器电容电压平衡方案的实验失活和激活进行了分类。
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来源期刊
IET Power Electronics
IET Power Electronics ENGINEERING, ELECTRICAL & ELECTRONIC-
CiteScore
5.50
自引率
10.00%
发文量
195
审稿时长
5.1 months
期刊介绍: IET Power Electronics aims to attract original research papers, short communications, review articles and power electronics related educational studies. The scope covers applications and technologies in the field of power electronics with special focus on cost-effective, efficient, power dense, environmental friendly and robust solutions, which includes: Applications: Electric drives/generators, renewable energy, industrial and consumable applications (including lighting, welding, heating, sub-sea applications, drilling and others), medical and military apparatus, utility applications, transport and space application, energy harvesting, telecommunications, energy storage management systems, home appliances. Technologies: Circuits: all type of converter topologies for low and high power applications including but not limited to: inverter, rectifier, dc/dc converter, power supplies, UPS, ac/ac converter, resonant converter, high frequency converter, hybrid converter, multilevel converter, power factor correction circuits and other advanced topologies. Components and Materials: switching devices and their control, inductors, sensors, transformers, capacitors, resistors, thermal management, filters, fuses and protection elements and other novel low-cost efficient components/materials. Control: techniques for controlling, analysing, modelling and/or simulation of power electronics circuits and complete power electronics systems. Design/Manufacturing/Testing: new multi-domain modelling, assembling and packaging technologies, advanced testing techniques. Environmental Impact: Electromagnetic Interference (EMI) reduction techniques, Electromagnetic Compatibility (EMC), limiting acoustic noise and vibration, recycling techniques, use of non-rare material. Education: teaching methods, programme and course design, use of technology in power electronics teaching, virtual laboratory and e-learning and fields within the scope of interest. Special Issues. Current Call for papers: Harmonic Mitigation Techniques and Grid Robustness in Power Electronic-Based Power Systems - https://digital-library.theiet.org/files/IET_PEL_CFP_HMTGRPEPS.pdf
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