Directed Assembly of p-Type Tellurium Nanowires for Room-Temperature-Processed Thin-Film Transistors

Abstract

The flexible electronics domain has emerged as an alternate technology beyond silicon CMOS because of advancements in low-temperature solution-processable thin-film transistors (TFTs) and circuits. However, uniformity and scalability remain the main hindrances for solution-processed devices, especially when it comes to the deposition of nanomaterials. In this regard, directional assembly using dielectrophoresis is a quick and easy way to uniformly align 1-D nanostructures, for example, nanowires, to bridge a gap between the electrodes to form a transistor channel using nonlinear ac electric fields. In this study, high-hole mobility tellurium nanowires are assembled using nonlinear ac dielectrophoresis to fabricate electrolyte-gated TFTs (EG-TFTs) on a flexible substrate at room temperature. These p-type flexible transistors exhibit an on-off ratio of $3.3\times 10^{2}$ , an ON-current density of 20 $\mu $ A $\mu $ m−1, a specific transconductance of 8.5 $\mu $ S $\mu $ m−1, and linear mobility of 20.6 cm2 V−1 s−1 with adequate mechanical strain tolerance.