MEMS-Oriented Single-Crystalline-Silicon Through-Silicon-Via Based on Filling and Oxidation of Silicon Powders

Abstract

This paper, for the first time, introduces filling and oxidation of silicon powders (FOSP) into through-silicon insulation, and develops a single-crystalline-silicon (SCS) through-silicon-via (TSV) for MEMS front-end process. Submicron silicon powders are filled into annular trenches on one side of low-resistivity SCS wafer by a silica-gel scraper, which is followed by surface cleaning to wipe off residual powders and oxidation to turn these trench-filled incompact silicon powders into solidified SiO2 liner respectively. After the same process is carried out on the other side, isolated conductive silicon pillars are formed and strongly anchored to the substrate. The FOSP-based SCS TSV wafer is tolerant to high temperature and acid, and hardly influenced by coefficient of thermal expansion (CTE) mismatch. Thinning step is omitted in its fabrication process, which guarantees low total thickness variation (TTV). A 6-inch FOSP-based SCS TSV wafer with $380\mu $ m thickness and 20480 vias has been developed successfully. Its structure strength, air-tightness, TTV and warpage are studied. Measurement results show that the leakage current per TSV is about 0.2pA at 20V, and the resistance of conductive silicon pillar ranges from $50\Omega $ to $140\Omega $ ( $0.017\sim 0.022\Omega \cdot $ cm resistivity and $66\mu $ m/ $88\mu $ m diameter). Furthermore, with a testing process, the FOSP-based SCS TSV wafer is proven qualified for metal thermocompression bonding, forming an integrated wafer that can go through grinding and deep reactive ion etching (DRIE). The proposed SCS TSV technology is not restrained by wafer thickness and depth-to-width ratio of DRIE, so it can be applied to large-sized SCS wafer.[2024-0127]