An ultra-low power wake-Up timer compatible with n-FET based flexible technologies

IF 12.3 1区 材料科学 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
D. Narbón, J. L. Soler-Fernández, A. Santos, P. Barquinha, R. Martins, A. Diéguez, J. D. Prades, O. Alonso
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引用次数: 0

Abstract

Flexible integrated circuits (FlexICs) have drawn increasing attention, particularly in remote sensors and wearables operating in a limited power budget. Here, we present an ultra-low power timer designed to wake-up an external circuit periodically, from a deep-sleep state into an active state, thereby largely reducing the system power consumption. We achieved this with a circuit topology that exploits the transistor’s leakage current to generate a low frequency wake-up signal. This topology is compatible with IC technologies where only n-type transistors are available. The design was implemented with the sustainable FlexIC process of PragmatIC, that is based on Indium Gallium Zinc Oxide (IGZO) thin-film transistors. Our timer generates mean wake-up frequency of 0.24 ± 0.15 Hz, with a mean power consumption of 26.7 ± 14.1 nW. In this paper, we provide details of the Wake-Up timer’s design and performance at different supply voltages, under temperature variations and different light conditions.

Abstract Image

超低功耗唤醒定时器兼容基于n-FET的灵活技术
柔性集成电路(flexic)已经引起了越来越多的关注,特别是在远程传感器和可穿戴设备中,在有限的功率预算下运行。在这里,我们提出了一个超低功耗定时器,旨在周期性地唤醒外部电路,从深度睡眠状态进入活动状态,从而大大降低了系统功耗。我们通过利用晶体管的漏电流产生低频唤醒信号的电路拓扑实现了这一点。这种拓扑结构兼容仅使用n型晶体管的IC技术。该设计采用了PragmatIC公司基于铟镓锌氧化物(IGZO)薄膜晶体管的可持续FlexIC工艺。我们的计时器平均唤醒频率为0.24±0.15 Hz,平均功耗为26.7±14.1 nW。在本文中,我们详细介绍了唤醒定时器在不同电源电压、温度变化和不同光照条件下的设计和性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
CiteScore
17.10
自引率
4.80%
发文量
91
审稿时长
6 weeks
期刊介绍: npj Flexible Electronics is an online-only and open access journal, which publishes high-quality papers related to flexible electronic systems, including plastic electronics and emerging materials, new device design and fabrication technologies, and applications.
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