Andrew Maclellan;Louise H. Crockett;Robert W. Stewart
{"title":"RFSoC Modulation Classification With Streaming CNN: Data Set Generation & Quantized-Aware Training","authors":"Andrew Maclellan;Louise H. Crockett;Robert W. Stewart","doi":"10.1109/OJCAS.2024.3509627","DOIUrl":null,"url":null,"abstract":"This paper introduces a novel FPGA-based Convolutional Neural Network (CNN) architecture for continuous radio data processing, specifically targeting modulation classification on the Zynq UltraScale+ Radio Frequency System on Chip (RFSoC) operating in real-time. Evaluated on AMD’s RFSoC2x2 development board, the design integrates General Matrix Multiplication (GEMM) optimisations and fixed-point arithmetic. We also present a method for creating Deep Learning (DL) data sets for wireless communications, incorporating the RFSoC into the data generation loop. Furthermore, we explore quantised-aware training, producing three modulation classification models with different fixed-point weight precisions (16-bit, 8-bit, and 4-bit). We interface with the implemented hardware through the open-source PYNQ project, which combines Python with programmable logic interaction, enabling real-time modulation prediction via a PYNQ-enabled Jupyter app. The three models, operating at a 128 MHz sampling rate prior to the decimation stage, were evaluated for accuracy and resource consumption. The 16-bit model achieved the highest accuracy with minimal additional resource usage compared to the 8-bit and 4-bit models, making it the optimal choice for deploying a modulation classifier at the receiver.","PeriodicalId":93442,"journal":{"name":"IEEE open journal of circuits and systems","volume":"6 ","pages":"38-49"},"PeriodicalIF":2.4000,"publicationDate":"2024-12-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10772713","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE open journal of circuits and systems","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10772713/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
This paper introduces a novel FPGA-based Convolutional Neural Network (CNN) architecture for continuous radio data processing, specifically targeting modulation classification on the Zynq UltraScale+ Radio Frequency System on Chip (RFSoC) operating in real-time. Evaluated on AMD’s RFSoC2x2 development board, the design integrates General Matrix Multiplication (GEMM) optimisations and fixed-point arithmetic. We also present a method for creating Deep Learning (DL) data sets for wireless communications, incorporating the RFSoC into the data generation loop. Furthermore, we explore quantised-aware training, producing three modulation classification models with different fixed-point weight precisions (16-bit, 8-bit, and 4-bit). We interface with the implemented hardware through the open-source PYNQ project, which combines Python with programmable logic interaction, enabling real-time modulation prediction via a PYNQ-enabled Jupyter app. The three models, operating at a 128 MHz sampling rate prior to the decimation stage, were evaluated for accuracy and resource consumption. The 16-bit model achieved the highest accuracy with minimal additional resource usage compared to the 8-bit and 4-bit models, making it the optimal choice for deploying a modulation classifier at the receiver.