Improving Linearity and Symmetry of Synaptic Update Characteristics and Retentivity of Synaptic States of the Domain-Wall Device Through Addition of Edge Notches
{"title":"Improving Linearity and Symmetry of Synaptic Update Characteristics and Retentivity of Synaptic States of the Domain-Wall Device Through Addition of Edge Notches","authors":"Raman Hissariya;Debanjan Bhowmik","doi":"10.1109/OJNANO.2024.3514900","DOIUrl":null,"url":null,"abstract":"Compute-in-memory (CIM) crossbar arrays of non-volatile memory (NVM) synapse devices have been considered very attractive for fast and energy-efficient implementation of various neural network (NN) algorithms. High retention time of the synaptic states and high linearity and symmetry of the synaptic weight update characteristics (long-term potentiation (LTP) and long-term depression (LTD)) are major requirements for the NVM synapses in order to obtain high classification accuracy upon implementation of the NN algorithms on the corresponding crossbar arrays. In this paper, with respect to the spin-orbit-torque-driven domain-wall synapse device, we show that addition of edge notches significantly helps in satisfying the aforementioned requirements. At finite temperatures, notches prevent the domain wall from moving due to stray dipole and thermal fields when SOT-causing current is not applied. This, in turn, improves linearity and asymmetry of the LTP and LTD characteristics of the device as well as the retention time of synaptic states. We have also studied how these synaptic properties depend on the spacing between the notches and the size of the notches in the device. We perform this analysis here through rigorous micromagnetic simulations carried out for room temperature (300K), with dipole and thermal fields taken into account.","PeriodicalId":446,"journal":{"name":"IEEE Open Journal of Nanotechnology","volume":"6 ","pages":"1-9"},"PeriodicalIF":1.8000,"publicationDate":"2024-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10787236","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Open Journal of Nanotechnology","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10787236/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"MATERIALS SCIENCE, MULTIDISCIPLINARY","Score":null,"Total":0}
引用次数: 0
Abstract
Compute-in-memory (CIM) crossbar arrays of non-volatile memory (NVM) synapse devices have been considered very attractive for fast and energy-efficient implementation of various neural network (NN) algorithms. High retention time of the synaptic states and high linearity and symmetry of the synaptic weight update characteristics (long-term potentiation (LTP) and long-term depression (LTD)) are major requirements for the NVM synapses in order to obtain high classification accuracy upon implementation of the NN algorithms on the corresponding crossbar arrays. In this paper, with respect to the spin-orbit-torque-driven domain-wall synapse device, we show that addition of edge notches significantly helps in satisfying the aforementioned requirements. At finite temperatures, notches prevent the domain wall from moving due to stray dipole and thermal fields when SOT-causing current is not applied. This, in turn, improves linearity and asymmetry of the LTP and LTD characteristics of the device as well as the retention time of synaptic states. We have also studied how these synaptic properties depend on the spacing between the notches and the size of the notches in the device. We perform this analysis here through rigorous micromagnetic simulations carried out for room temperature (300K), with dipole and thermal fields taken into account.