Non-Hermitian hybrid silicon photonic switching

Abstract

Leveraging the entire space of complex dielectric permittivity, non-Hermitian photonics has fundamentally altered wave propagation with complex optical potentials and has ushered in a host of new photonic applications. Through parity–time symmetry and its breaking—a delicate interplay between gain and loss—even the interaction between just two entities becomes counter-intuitive and intriguing. Here we realize, through hybrid III–V/Si integration, a scalable non-Hermitian switching network on a two-layer integrated photonic chip. Our platform is a hybrid, with a bottom silicon layer and a top InGaAsP layer that provides optical gain. By tuning the gain level in the top layer, vertically coupled waveguides operate below or above the exceptional point, where light is switched across two layers, among different input–output ports. For a single switching unit, the switching dynamics are ultrafast, on the order of 100 ps. In a large switching network, non-blocking and other diverse connectivities are established in single-wavelength and wavelength-selective switching, with high extinction ratios. Our approach adds scalable non-Hermitian switching to photonic design toolkits to simultaneously boost the switching time and bandwidth density to cutting-edge levels, therefore paving the way for compact and ultrafast monolithic integrated silicon photonics in next-generation optical information networks. An on-chip, high-bandwidth-density non-Hermitian hybrid switching network based on the integration of III–V and silicon materials is demonstrated, paving the way for compact and ultrafast monolithic integrated silicon photonics for large-scale and high-dimensional information processing.