A Hardware Chaotic Neural Network With Gap Junction Models

Abstract

We aim at the engineering applications of reservoir computing using hardware chaotic neural networks, including associative memory recall. The reservoir layer used in reservoir computing is networked and constructed using pulse-type hardware chaos neuron models (P-HCNMs). The structure of the reservoir layer is simple, which is advantageous for hardware implementation. By inducing chaos in the reservoir layer, it is possible to use the “chaotic edge” where the reservoir reaches its highest efficiency. It has also been reported that incorporating self-correction within the reservoir layer increases the efficiency of the task. In this paper, we constructed a hardware small-world neural network using a synaptic model with spike timing-dependent synaptic plasticity (STDP) and a gap junction model. As a result, it is clarified that all cell body models with synaptic model connections show chaotic firing by simulation at the same time, and that the STDP model enables learning while keeping the chaotic phenomena. In addition, comparison with the firing of cell body models coupled only with synaptic models suggested that the gap junction model works significantly in inducing chaos in neural networks.