A −11.6-dBm OMA Sensitivity 0.55-pJ/bit 40-Gb/s Optical Receiver Designed Using a 2-Port-Parameter-Based Design Methodology

Abstract

This article presents a systematic design methodology for transimpedance amplifiers (TIAs) based on two-port parameters, enabling efficient exploration of complex TIA architectures, including multistage forward amplifiers, and facilitating the identification of optimal design parameters to meet target specifications. Using this methodology, an analog front-end (AFE) with a low-noise, low-power, high-gain TIA was designed in a 22-nm FinFET process. Post-layout simulations show that the AFE achieves an input-referred noise current (INRC) of 0.78- $\mu $ A rms, an averaged INRC density of 6.4 pA/ $\sqrt {\text {Hz}}$ , consumes 11.4 mW of power, and provides 87-dB $\Omega $ transimpedance gain with a 14.2-GHz bandwidth. The simulated TIA performance closely matches the results predicted by the design methodology, validating its accuracy and effectiveness. A prototype optical receiver featuring this AFE was fabricated in a 22-nm process and measured to achieve an OMA sensitivity of −11.6 dBm with an energy efficiency of 0.55 pJ/bit at a data rate of 40 Gb/s.