Preliminary design and development of the module back-end electronics for the large area detector onboard the eXTP mission

Abstract

The Large Area Detector (LAD) is one of the science payloads of the enhanced X-ray Timing and Polarimetry (eXTP) mission. The LAD is a spectral-timing instrument with a broad energy response, covering a range from 2 to 30 keV, a good timing resolution of better than 10 µs, and an expected energy resolution of 260 eV at 6 keV. The LAD consists of 640 large-area multi-anode Silicon Drift Detectors (SDDs). Given the large number of detectors, the LAD uses a modular design. Each module comprises sixteen detectors, and each detector is equipped with dedicated Front-End Electronics (FEE), interfacing with two separate Module Back-End Electronics (MBEEs). Each MBEE is designed to process the data from 1,792 anode channels in 8 FEEs (224 anode channels per FEE), performing the energy reconstruction and time tagging for X-ray events. The MBEE uses the European Field Programmable Gate Array (FPGA) from NanoXplore™, based on a pipeline concept, which reduces dead time, making the LAD suitable for higher flux X-ray detection, and it can handle a sustained flux of >500 mCrab and a continuous flux of >15 Crab for up to 300 minutes (Feroci et al. 2018). Additionally, the MBEE serves as the central hub for configuring the module’s electronics, including the FEEs, the Power Supply Unit (PSU), and the MBEE itself, and it is also responsible for collecting housekeeping data to monitor the system’s status. The prototype MBEE was designed, manufactured, and programmed with FPGA firmware using VHDL. The basic functional test was conducted in this paper, and the results indicated that the MBEE could be operated in different modes to perform the functions mentioned above. Analysis and testing show that it can transmit event packets-containing timing tag, event type, position ID, and energy information-at a baud rate of 2 Mbps with an event loss fraction of 1.5%.