Analog Probe Module (APM) for Enhanced IC Observability: From Concept to Application

IF 2.8 2区 工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Anshaj Shrivastava;Gaurab Banerjee
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Abstract

This study presents a compact, on-chip analog probe module (APM) to augment the IEEE 1149.4 (or P1687.2) standard for efficiently probing multiple internal nodes. The complete approach to APM implementation, from conceptualization to practical application, is discussed in detail. The APM aims to utilize a minimum area for a maximum number of probe channels, achieving an optimal size of 4:15. At the transistor level, the design minimizes the impact of glitches in asynchronous operations through a symmetrical layout and a unique arrangement of all probe channels. However, glitches in asynchronous circuits can still exist; hence, a state transition matrix (STM) concept is devised. STMs help visualize hazardous transitions, allowing the identification of a common hazard-free transition sequence suitable for hardware implementation. The verified APM design is integrated with several analog/RF circuits fabricated in a commercially available 0.18- $\mu $ m RF-CMOS process as part of a radar-on-chip system. An important APM application of enabling the prediction of an IC’s corner disposition by measuring dc-node voltages during postsilicon IC testing is demonstrated for 16 fabricated ICs.
用于增强集成电路可观察性的模拟探针模块 (APM):从概念到应用
本研究提出了一种紧凑的片上模拟探针模块(APM),以增强IEEE 1149.4(或P1687.2)标准,有效地探测多个内部节点。详细讨论了APM实现的完整方法,从概念到实际应用。APM的目标是利用最小的面积来实现最大数量的探测通道,达到4:15的最佳尺寸。在晶体管层面,该设计通过对称布局和所有探针通道的独特安排,最大限度地减少了异步操作中故障的影响。然而,异步电路中的故障仍然存在;因此,提出了状态转移矩阵(STM)概念。stm帮助可视化危险转换,允许识别适合硬件实现的通用无危险转换序列。经过验证的APM设计集成了几个模拟/RF电路,这些电路采用市售的0.18- $ $ μ $ m RF- cmos工艺制造,作为片上雷达系统的一部分。在硅后集成电路测试过程中,通过测量直流节点电压来预测集成电路的拐角配置,这是一个重要的APM应用。
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来源期刊
CiteScore
6.40
自引率
7.10%
发文量
187
审稿时长
3.6 months
期刊介绍: The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.
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