Tianxiang Wu , Chen Lin , Ning Zuo , Qiwei Hu , Lijuan Yuan , Peiyuan Lu , Junhui Li
{"title":"A high-precision GSG probe planarization method based on direct current signal","authors":"Tianxiang Wu , Chen Lin , Ning Zuo , Qiwei Hu , Lijuan Yuan , Peiyuan Lu , Junhui Li","doi":"10.1016/j.mejo.2024.106478","DOIUrl":null,"url":null,"abstract":"<div><div>Since the GSG (ground-signal-ground) probe has three pins, it needs planarization before the wafer test. To ensure the reliability of the RF wafer test, a new high-precision GSG probe planarization method is first proposed based on DC (Direct Current) analysis. The angle-force model of the GSG probe contact and separation process is derived, which is based on the analysis of the collected real-time force and electrical data using a designed force sensing system, and voltage measuring circuit. The results show that when the GSG probe is in contact with the substrate and away from the substrate, the relationship between the angle and force model is a primary function and a quadratic function respectively. The angle of the GSG probe can be obtained by substituting the force of the change points of voltage and resistance into the angle and force model. In addition, the smaller the difference between the minimum force at two-pin contact and three-pin contact of the GSG probe, the smaller the angle of the GSG probe. This method can provide a method and idea for the automatic planarization of GSG probes.</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":"155 ","pages":"Article 106478"},"PeriodicalIF":1.9000,"publicationDate":"2024-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1879239124001826","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
Since the GSG (ground-signal-ground) probe has three pins, it needs planarization before the wafer test. To ensure the reliability of the RF wafer test, a new high-precision GSG probe planarization method is first proposed based on DC (Direct Current) analysis. The angle-force model of the GSG probe contact and separation process is derived, which is based on the analysis of the collected real-time force and electrical data using a designed force sensing system, and voltage measuring circuit. The results show that when the GSG probe is in contact with the substrate and away from the substrate, the relationship between the angle and force model is a primary function and a quadratic function respectively. The angle of the GSG probe can be obtained by substituting the force of the change points of voltage and resistance into the angle and force model. In addition, the smaller the difference between the minimum force at two-pin contact and three-pin contact of the GSG probe, the smaller the angle of the GSG probe. This method can provide a method and idea for the automatic planarization of GSG probes.
期刊介绍:
Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems.
The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc.
Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.