Jing Chen , Jiahao Wu , Wei Du , Qing Yao , Kemeng Yang , Jun Zhang , Jiafei Yao , Yufeng Guo
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引用次数: 0
Abstract
—This paper proposes general neural network-based static performance prediction model construction techniques for gate-all-around (GAA) and planar field effect transistor (FET). Firstly, a unique data preprocessing method named quasi-linear transformation is proposed to improve the prediction accuracy. By introducing transformation functions to process the input, the relationship between the input and output is simplified, thereby facilitating the model training. Secondly, an improved weighted loss function scheme that considers a more comprehensive evaluation criterion to enhance the training process is proposed. Compared with traditional artificial neural networks, the average prediction error of the output and transfer curves is reduced by 33 % and 25 % for GAA and planar FET, respectively. Meanwhile, the proposed model demonstrates strong extrapolation ability. Moreover, compared to traditional methods of obtaining static characteristic curves, this method is more efficient. Furthermore. the proposed neural network-based static performance prediction model is converted to Verilog-A model, demonstrating potential in circuit simulation.
期刊介绍:
Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems.
The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc.
Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.