Fully dynamic zoom ADC with energy-efficient residue feedforward and two-step summation

IF 1.9 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Journal Pub Date : 2024-11-10 DOI:10.1016/j.mejo.2024.106474

Rongshan Wei, Zhijian Zheng, Yuxuan Lin, Nannan Xu, Gumeng Zhao, Qunchao Chen

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引用次数: 0

Abstract

This paper proposes a fully dynamic zoom ADC based on residue feedforward and correlated level shifting (CLS)-assisted floating inverter amplifier (FIA) technique with 200 × bandwidth/power scalability, by only changing the clock frequency. A CLS-assisted FIA which achieves 65 dB DC gain is employed to reduce errors from finite FIA gain. An energy-efficient residue feedforward path extracted from the input of the SAR ADC's comparator minimizes the leakage of the SAR ADC's quantization noise into the band. A novel two-step summation approach is proposed to minimize capacitor areas compared to a traditional passive switched-capacitor adder. The post-simulated results show the prototype ADC with near-constant energy efficiency, which scales power from 5 μW to 822 μW, achieves high resolution (>100 dB) during the scalable bandwidth. At 20 kHz BW, it achieves 106.2 dB DR, 102.0 dB SNDR, leading to FoM_DR of 180.0 dB and FoM_SNDR of 175.8 dB.

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具有高能效残差前馈和两步求和功能的全动态变焦 ADC

本文提出了一种基于残差前馈和相关电平移动（CLS）辅助浮动反相放大器（FIA）技术的全动态变焦 ADC，只需改变时钟频率即可实现 200 × 带宽/功率可扩展性。CLS 辅助浮动变频放大器可实现 65 dB 的直流增益，以减少有限浮动变频放大器增益带来的误差。从 SAR ADC 比较器输入端提取的高能效残差前馈路径最大程度地减少了 SAR ADC 量化噪声对频带的泄漏。与传统的无源开关电容加法器相比，提出了一种新颖的两步求和方法，以最大限度地减少电容面积。后仿真结果表明，原型 ADC 的能效接近恒定，功率从 5 μW 扩展到 822 μW，在可扩展带宽内实现了高分辨率（100 dB）。在 20 kHz BW 时，它的 DR 值为 106.2 dB，SNDR 值为 102.0 dB，FoMDR 值为 180.0 dB，FoMSNDR 值为 175.8 dB。

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来源期刊

Microelectronics Journal 工程技术-工程：电子与电气

CiteScore

4.00

自引率

27.30%

发文量

222

审稿时长

43 days

期刊介绍： Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.