Enhancing the reliability of CSP solder joints under thermal cycling conditions through particle swarm optimization of an improved BP neural network

IF 1.9 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Miao Zhu, Xuexia Yang, Yanxi Sun, Ze Wang, Erqiang Liu
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引用次数: 0

Abstract

The packaging of chip-scale (CSP) devices plays a pivotal role in enhancing the reliability of CSP under thermal cycling conditions, largely due to the intricate structure and the recurrent alterations in the actual operating environment. The objective of this study is to enhance the reliability of solder joints by optimising the structural parameters of CSP packaging in order to reduce the strain values at the solder joints. In order to enhance the design efficiency and accuracy of the computational model, the Anand model is adopted in order to define the solder joint parameters, and finite element simulations are conducted using Ansys software. This paper puts forward a novel intelligent algorithm that fuses response surface methodology with a neural network-particle swarm optimization algorithm, thereby enhancing the precision of the system. The method is capable of identifying the combination with the minimum strain value using limited data, thereby addressing the issue of insufficient generalisation ability in conventional methods. The implementation of this method into the model resulted in a minimum strain value of 4.071 × 10−3, representing a 37.6 % reduction compared to the original CSP structure. Furthermore, the optimized lifespan is approximately 3.24 times longer than that observed prior to optimization. The approach presented in this paper has the potential to significantly enhance design efficiency and increase the lifespan of components. It offers a novel perspective for optimising the structural parameters of CSP packaging.
通过改进型 BP 神经网络的粒子群优化提高热循环条件下 CSP 焊点的可靠性
芯片级 (CSP) 器件的封装对提高 CSP 在热循环条件下的可靠性起着关键作用,这主要是由于其复杂的结构和实际操作环境的反复变化。本研究的目的是通过优化 CSP 封装的结构参数来提高焊点的可靠性,从而降低焊点的应变值。为了提高设计效率和计算模型的准确性,本文采用 Anand 模型来定义焊点参数,并使用 Ansys 软件进行有限元模拟。本文提出了一种新颖的智能算法,将响应面方法与神经网络-粒子群优化算法相融合,从而提高了系统的精度。该方法能够利用有限的数据确定应变值最小的组合,从而解决了传统方法概括能力不足的问题。在模型中实施该方法后,最小应变值为 4.071 × 10-3,与原始 CSP 结构相比减少了 37.6%。此外,优化后的寿命约为优化前的 3.24 倍。本文介绍的方法具有显著提高设计效率和延长组件寿命的潜力。它为优化 CSP 封装的结构参数提供了一个新的视角。
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来源期刊
Microelectronics Journal
Microelectronics Journal 工程技术-工程:电子与电气
CiteScore
4.00
自引率
27.30%
发文量
222
审稿时长
43 days
期刊介绍: Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.
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