{"title":"Signal Processing Architecture for a Trustworthy 77-GHz MIMO Radar","authors":"Ram Kishore Arumugam;André Froehly;Patrick Wallrath;Reinhold Herschel;Nils Pohl","doi":"10.1109/TRS.2024.3479711","DOIUrl":null,"url":null,"abstract":"Radar systems are used in safety-critical applications in vehicles, so it is necessary to ensure their functioning is reliable and trustworthy. System-on-chip (SoC) radars, which are commonly used now-a-days, are inherently vulnerable to data manipulation and attacks to gain intellectual property (IP) of the system. This article outlines the vulnerabilities of the SoC radars and proposes a distributed signal processing to improve the resilience of the system. The trustworthiness of the system is improved by partitioning the signal processing into smaller modules. We propose to implement these modules on separate processors such that it is made up of multiple application-specific integrated circuits (ASICs). Furthermore, a sparse antenna topology is proposed to limit the information stored in these modules. Therefore, it is difficult to execute a successful attack or gain any knowledge of the targets or system design based on the compromised data in one ASIC. This article introduces the generic structure for partitioning the signal processing steps involved in target detection and the sparse array topology used by the 77-GHz radar. A method for estimating the azimuth and elevation angles for the considered sparse array is also introduced.","PeriodicalId":100645,"journal":{"name":"IEEE Transactions on Radar Systems","volume":"2 ","pages":"1112-1122"},"PeriodicalIF":0.0000,"publicationDate":"2024-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10716432","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Radar Systems","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10716432/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Radar systems are used in safety-critical applications in vehicles, so it is necessary to ensure their functioning is reliable and trustworthy. System-on-chip (SoC) radars, which are commonly used now-a-days, are inherently vulnerable to data manipulation and attacks to gain intellectual property (IP) of the system. This article outlines the vulnerabilities of the SoC radars and proposes a distributed signal processing to improve the resilience of the system. The trustworthiness of the system is improved by partitioning the signal processing into smaller modules. We propose to implement these modules on separate processors such that it is made up of multiple application-specific integrated circuits (ASICs). Furthermore, a sparse antenna topology is proposed to limit the information stored in these modules. Therefore, it is difficult to execute a successful attack or gain any knowledge of the targets or system design based on the compromised data in one ASIC. This article introduces the generic structure for partitioning the signal processing steps involved in target detection and the sparse array topology used by the 77-GHz radar. A method for estimating the azimuth and elevation angles for the considered sparse array is also introduced.