Backdoor Attacks on Safe Reinforcement Learning-Enabled Cyber–Physical Systems

IF 2.7 3区 计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Shixiong Jiang;Mengyu Liu;Fanxin Kong
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引用次数: 0

Abstract

Safe reinforcement learning (RL) aims to derive a control policy that navigates a safety-critical system while avoiding unsafe explorations and adhering to safety constraints. While safe RL has been extensively studied, its vulnerabilities during the policy training have barely been explored in an adversarial setting. This article bridges this gap and investigates the training time vulnerability of formal language-guided safe RL. Such vulnerability allows a malicious adversary to inject backdoor behavior into the learned control policy. First, we formally define backdoor attacks for safe RL and divide them into active and passive ones depending on whether to manipulate the observation. Second, we propose two novel algorithms to synthesize the two kinds of attacks, respectively. Both algorithms generate backdoor behaviors that may go unnoticed after deployment but can be triggered when specific states are reached, leading to safety violations. Finally, we conduct both theoretical analysis and extensive experiments to show the effectiveness and stealthiness of our methods.
对安全强化学习网络物理系统的后门攻击
安全强化学习(RL)旨在推导出一种控制策略,在避免不安全探索和遵守安全约束的同时,为安全关键型系统导航。虽然安全强化学习已经得到了广泛的研究,但在对抗环境下,其在策略训练过程中的弱点却几乎没有被探索过。本文弥补了这一空白,研究了形式语言引导的安全 RL 在训练时的脆弱性。这种漏洞允许恶意对手向学习到的控制策略注入后门行为。首先,我们正式定义了安全 RL 的后门攻击,并根据是否操纵观察结果将其分为主动和被动攻击。其次,我们提出了两种新算法来分别合成这两种攻击。这两种算法生成的后门行为在部署后可能不会被注意到,但在达到特定状态时会被触发,从而导致安全违规。最后,我们进行了理论分析和大量实验,以展示我们方法的有效性和隐蔽性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
CiteScore
5.60
自引率
13.80%
发文量
500
审稿时长
7 months
期刊介绍: The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.
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