A column bus self-acceleration circuit for large array CMOS image sensor

IF 1.9 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Journal Pub Date : 2024-10-30 DOI:10.1016/j.mejo.2024.106458

Yu Sun, Changju Liu, Quanmin Chen, Jiangtao Xu

引用次数: 0

Abstract

This paper presents a column bus self-acceleration circuit based on dynamically regulating bias current, which aims to reduce the settling time of pixel output signal caused by the parasitic effect of the column bus. Through the mathematical model of the column bus, the relationship between the settling time and the bias current is analyzed. The proposed circuit is designed by a 110 nm CMOS process. Under the condition with a parasitic capacitance of 10.61 pF and a parasitic resistance of 6.3 kΩ, simulation results show that the proposed self-acceleration circuit can reduce the settling time of pixel output signal from 13.8μs to 4.1μs. Compared with the traditional column bus structure, the settling time of the pixel output signal is reduced by 71 %. The self-acceleration circuit can effectively improve the readout speed of large array CMOS image sensor.

查看原文本刊更多论文

用于大型阵列 CMOS 图像传感器的列总线自加速电路

本文提出了一种基于动态调节偏置电流的列总线自加速电路，旨在减少列总线寄生效应引起的像素输出信号的沉淀时间。通过列总线的数学模型，分析了沉淀时间与偏置电流之间的关系。所提出的电路采用 110 nm CMOS 工艺设计。仿真结果表明，在寄生电容为 10.61 pF 和寄生电阻为 6.3 kΩ 的条件下，所提出的自加速电路可将像素输出信号的沉淀时间从 13.8μs 缩短到 4.1μs。与传统的列总线结构相比，像素输出信号的沉淀时间缩短了 71%。自加速电路可有效提高大型阵列 CMOS 图像传感器的读出速度。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文求助全文

来源期刊

Microelectronics Journal 工程技术-工程：电子与电气

CiteScore

4.00

自引率

27.30%

发文量

222

审稿时长

43 days

期刊介绍： Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.